Changes between Version 10 and Version 11 of OFDM/MIMO/Docs/ModelRegisters
- Timestamp:
- Dec 2, 2006, 12:47:03 AM (18 years ago)
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OFDM/MIMO/Docs/ModelRegisters
v10 v11 469 469 ---- 470 470 == Rx_GlobalReset == 471 ==== Address: 0x4 ==== 472 ==== Dir: Read/Write ==== 471 === Address: 0x4 === 472 === Dir: Read/Write === 473 === Fields: === 474 ==== RX_RESET ==== 475 ''(Bit 0)'' Global reset for the receiver state machines. When set to 1, all state in the packet detection, PHY processing, packet construction and interrupt blocks is cleared. This reset does not clear the values of OPB regsters. 473 476 474 477 ---- 475 478 == Rx_OFDM_SymbolCounts == 476 ==== Address: 0x8 ==== 477 ==== Dir: Read/Write ==== 479 === Address: 0x8 === 480 === Dir: Read/Write === 481 === Fields: === 482 ==== NUM_BASERATE_SYMS ==== 483 ''(BitS 31:16 - UFix16_0)'' This integer sets the number of base rate symbols the receiver should process with each incoming packet. See the [wiki:OFDM/MIMO/Docs/PHYDetails/FrameFormat OFDM frame format] documentation for more information. 484 ==== NUM_TRAINING_SYMS ==== 485 ''(BitS 15:0 - UFix16_0)'' This integer sets the number of training symbol periods at the receiver. This value corresponds to the number of OFDM symbol periods dedicated to training. In MIMO mode, the training symbols are divided between antennas, orthogally in time. In SISO mode, every training period is used for estimating the single channel. See the [wiki:OFDM/MIMO/Docs/PHYDetails/FrameFormat OFDM frame format] documentation for more information. 478 486 479 487 ---- 480 488 == Rx_PktDet_Delay == 481 ==== Address: 0xC ==== 482 ==== Dir: Read/Write ==== 489 === Address: 0xC === 490 === Dir: Read/Write === 491 === Fields: === 492 ==== NUM_TRAINING_SYMS ==== 493 ''(BitS 6:0 - UFix7_0)'' This integer sets the delay inserted between the course packet detection signal and the start of receiver processing. This delay should correspond to the time difference between packet detection and the start of the preamble's fourth short training symbol. 483 494 484 495 ---- 485 496 == Rx_PktDet_LongCorr_Params == 486 ==== Address: 0x10 ==== 487 ==== Dir: Read/Write ==== 497 === Address: 0x10 === 498 === Dir: Read/Write === 499 === Fields: === 500 ==== CORR_SET_TIMING ==== 501 ''(Bits 31:16 - UFix16_0)'' This integer sets sample index used when a long correlation event occurs. The receiver uses a large counter to track packet timing. This counter increments with each sample, starting with course packet detection. When the long correlator crosses its threshold, the counter is set to this value. 502 ==== CORR_THRESHOLD ==== 503 ''(Bits 15:0 - UFix16_0)'' This integer sets the long correlation threshold used during fine packet detection and symbol timing. 504 488 505 489 506 ---- 490 507 == Rx_PktDone_Reset == 491 ==== Address: 0x14 ==== 492 ==== Dir: Read/Write ==== 508 === Address: 0x14 === 509 === Dir: Read/Write === 510 === Fields: === 493 511 494 512 ---- 495 513 == Rx_symbolTimingOffset == 496 ==== Address: 0x18 ==== 497 ==== Dir: Read/Write ==== 514 === Address: 0x18 === 515 === Dir: Read/Write === 516 === Fields: === 498 517 499 518 ---- 500 519 == Rx_FreqOffFilt_KI == 501 ==== Address: 0x1C ==== 502 ==== Dir: Read/Write ==== 520 === Address: 0x1C === 521 === Dir: Read/Write === 522 === Fields: === 503 523 504 524 ---- 505 525 == Rx_FreqOffFilt_KP == 506 ==== Address: 0x20 ==== 507 ==== Dir: Read/Write ==== 526 === Address: 0x20 === 527 === Dir: Read/Write === 528 === Fields: === 508 529 509 530 ---- 510 531 == Rx_Constellation_Scaling == 511 ==== Address: 0x24 ==== 512 ==== Dir: Read/Write ==== 532 === Address: 0x24 === 533 === Dir: Read/Write === 534 === Fields: === 513 535 514 536 ---- 515 537 == Rx_FFT_Scaling == 516 ==== Address: 0x28 ==== 517 ==== Dir: Read/Write ==== 538 === Address: 0x28 === 539 === Dir: Read/Write === 540 === Fields: === 518 541 519 542 ---- 520 543 == Rx_pktDet_Corr_Thresh == 521 ==== Address: 0x2C ==== 522 ==== Dir: Read/Write ==== 544 === Address: 0x2C === 545 === Dir: Read/Write === 546 === Fields: === 523 547 524 548 ---- 525 549 == Rx_pktDet_Energy_Thresh == 526 ==== Address: 0x30 ==== 527 ==== Dir: Read/Write ==== 550 === Address: 0x30 === 551 === Dir: Read/Write === 552 === Fields: === 528 553 529 554 ---- 530 555 == Tx_FFT_Scaling == 531 ==== Address: 0x34 ==== 532 ==== Dir: Read/Write ==== 556 === Address: 0x34 === 557 === Dir: Read/Write === 558 === Fields: === 533 559 534 560 ---- 535 561 == Tx_PreambleScaling == 536 ==== Address: 0x38 ==== 537 ==== Dir: Read/Write ==== 562 === Address: 0x38 === 563 === Dir: Read/Write === 564 === Fields: === 538 565 539 566 ---- 540 567 == Tx_NumPayloadBytes == 541 ==== Address: 0x3C ==== 542 ==== Dir: Read/Write ==== 568 === Address: 0x3C === 569 === Dir: Read/Write === 570 === Fields: === 543 571 544 572 ---- 545 573 == Tx_RandomPayload_ModSel == 546 ==== Address: 0x40 ==== 547 ==== Dir: Read/Write ==== 574 === Address: 0x40 === 575 === Dir: Read/Write === 576 === Fields: === 548 577 549 578 ---- 550 579 == Tx_Pilots_Index1 == 551 ==== Address: 0x44 ==== 552 ==== Dir: Read/Write ==== 580 === Address: 0x44 === 581 === Dir: Read/Write === 582 === Fields: === 553 583 554 584 ---- 555 585 == Tx_Pilots_Index2 == 556 ==== Address: 0x48 ==== 557 ==== Dir: Read/Write ==== 586 === Address: 0x48 === 587 === Dir: Read/Write === 588 === Fields: === 558 589 559 590 ---- 560 591 == Tx_Pilots_Value1 == 561 ==== Address: 0x4C ==== 562 ==== Dir: Read/Write ==== 592 === Address: 0x4C === 593 === Dir: Read/Write === 594 === Fields: === 563 595 564 596 ---- 565 597 == Tx_Pilots_Value2 == 566 ==== Address: 0x50 ==== 567 ==== Dir: Read/Write ==== 598 === Address: 0x50 === 599 === Dir: Read/Write === 600 === Fields: === 568 601 569 602 ---- 570 603 == Tx_OFDM_SymCounts == 571 ==== Address: 0x54 ==== 572 ==== Dir: Read/Write ==== 604 === Address: 0x54 === 605 === Dir: Read/Write === 606 === Fields: === 573 607 574 608 ---- 575 609 == Tx_Start_Reset_Control == 576 ==== Address: 0x58 ==== 577 ==== Dir: Read/Write ==== 610 === Address: 0x58 === 611 === Dir: Read/Write === 612 === Fields: === 578 613 579 614 ---- 580 615 == Tx_ControlBits == 581 ==== Address: 0x5C ==== 582 ==== Dir: Read/Write ==== 616 === Address: 0x5C === 617 === Dir: Read/Write === 618 === Fields: === 583 619 584 620 ---- 585 621 == Rx_BER_Errors == 586 ==== Address: 0x60 ==== 587 ==== Dir: Read-only ==== 622 === Address: 0x60 === 623 === Dir: Read-only === 624 === Fields: === 588 625 589 626 ---- 590 627 == Rx_BER_TotalBits == 591 ==== Address: 0x64 ==== 592 ==== Dir: Read-only ==== 628 === Address: 0x64 === 629 === Dir: Read-only === 630 === Fields: === 593 631 594 632 ---- 595 633 == Rx_packet_done == 596 ==== Address: 0x68 ==== 597 ==== Dir: Read-only ==== 634 === Address: 0x68 === 635 === Dir: Read-only === 636 === Fields: === 598 637 599 638 ---- 600 639 == Tx_PktDone == 601 === = Address: 0x6C ====602 === = Dir: Read-only ====640 === Address: 0x6C === 641 === Dir: Read-only ===
