Changes between Version 12 and Version 13 of OFDMReferenceDesign

Timestamp:

Mar 29, 2007, 4:40:36 PM (17 years ago)

Author:

cjcamp

Comment:

--

OFDMReferenceDesign

@@ -3 +3 @@
 By default, this project creates a custom wireless ethernet link between two computers, each attached to a WARP kit (FPGA board + clock board + radio board).  Each computer is unaware that a wireless link is present, and simply communicates with its neighbor using a standard wired connection.  The WARP boards are "inserted" between the two computers to provide a transparent wireless bridge.  The following diagram gives a simple overview of the configuration used for this example.
 
-[[Image(OFDMReferenceDesign/Files:overview.jpg)]]
+[[Image(OFDMReferenceDesign/Files:overview_01a.jpg)]]
 
 If it not possible to obtain two computers, the WARP link may be inserted into the wired connection between a single computer and a DHCP server.  Typically, the WARP boards will be inserted between the computer and an RJ45 jack in a laboratory or office.  This configuration, while appearing to be a simpler one, may be more difficult to troubleshoot in the event that problems arise.
 
-The project treats ethernet packets as payload only; the WARP board performs no IP processing whatsoever. The following are two example applications.
+The WARP kits that implement the wireless link treat Ethernet packets ONLY as payload, and do not perform ANY IP processing.
+
+== Initial Setup ==
+
+The following image illustrates a complete set of hardware used to implement this example.  IF YOU HAVE NOT ALREADY DONE SO, NOW WOULD BE A GOOD TIME TO WORK THROUGH THE LABORATORY EXERCISE [http://warp.rice.edu/trac/wiki/Exercises/FPGABoardIntro INTRODUCTION TO THE WARP FPGA BOARD].  This introductory exercise provides a solid introduction to using the boards, including detailed illustrations of correct cable connections.
+
+[[Image(OFDMReferenceDesign/Files:setup_01a.jpg)]]
+
+Five cable connections must be made to each WARP kit before this demo may be performed:
+
+   - a 12 V power supply connection to the FPGA board's power input,
+   - an antenna connection to the "outside" antenna port of the radio board,
+   - an MMCX-to-MMCX cable connected to the clock input of the radio board,
+   - an MMCX-to-MMCX cable connected to a clock output connector on the clock board, and
+   - a wired Ethernet connection,
+
+The following images illustrate each of these connections.  EXERCISE EXTREME CAUTION WHEN PLUGING A CABLE INTO THE CLOCK BOARD, AS THE INTERFACE BETWEEN IT AND THE FPGA BOARD IS EXTREMELY DELICATE!  THE CLOCK BOARD SHOULD BE GRASPED FIRMLY BE THE EDGES TO PREVENT ANY ROCKING MOTION WHEN INSTALLING THE MMCX-TO-MMCX CABLE.
+
+[[Image(OFDMReferenceDesign/Files:setup_02a.jpg)]]
+
+