| | 10 | |
| | 11 | |
| | 12 | == 7.6.0 Release: == |
| | 13 | '''Download: [http://warpproject.org/dl/refdes/warplab/v7/release/WARPLab_Reference_Design_7.6.0.zip WARPLab_Reference_Design_7.6.0.zip]''' |
| | 14 | |
| | 15 | Release Details: |
| | 16 | ||= Hardware =||= Release =||= Date Posted =||= SVN Rev. =||= ISE Ver. =||= Arch =||= MATLAB Ver. =||= RF Interface Support =|| |
| | 17 | || WARP v3 || 7.6.0 || 14-Sept-2015 || [browser:ResearchApps/PHY/WARPLAB/WARPLab7?rev=4713 4713] || 14.4 || MB/AXI || 2009b or later || 1-2: WARP v3 on-board interfaces [[BR]] 3-4: Requires [wiki:HardwareUsersGuides/FMC-RF-2X245 FMC-RF-2X245] || |
| | 18 | |
| | 19 | '''WARPLab 7.6.0 requires an SVN update to your [wiki:edk_user_repository edk_user_repository] before compiling the reference software project''' |
| | 20 | |
| | 21 | '''WARPLab 7.6.0''' provides transport improvements to the existing WARPLab 7.5.1 design and better M compatibility with earlier WARPLab releases. |
| | 22 | |
| | 23 | Other changes: |
| | 24 | * Added [wiki:WARPLab/Examples/MIMO_OFDM MIMO OFDM Communication Example] |
| | 25 | * Updated transport infrastructure on the node |
| | 26 | * Allows Read IQ / Write IQ commands to be processed while the node is transmitting or receiving (removes the restriction introduced in WARPLab 7.5.x) |
| | 27 | * Replaced WARPxilnet with [http://warpproject.org/trac/browser/edk_user_repository/WARP/sw_services/WARP_ip_udp_v1_00_a?rev=4713 '''WARP IP/UDP v1.00a'''] Ethernet packet processing library. |
| | 28 | * Updated MEX transport (see [wiki:WARPLab/Benchmarks Benchmarks]) - '''WARPLab 7.6.0 requires MEX 1.0.3a''' |
| | 29 | * Updated radio controller core to fix minor bugs |
| | 30 | * Changed default parameters to match the 802.11 reference design |
| | 31 | * Updated Ethernet behaviour |
| | 32 | * By default, nodes do not link with non-1000BASE-T Ethernet devices. |
| | 33 | * WARPLab waits for Ethernet device to be ready before completing boot. |
| | 34 | * Consolidated Ethernet behaviour options in [http://warpproject.org/trac/browser/ResearchApps/PHY/WARPLAB/WARPLab7/C_Code_Reference/include/wl_common.h?rev=4708 wl_common.h] |
| | 35 | * Added WARPLab command to control the [wiki:WARPLab/Reference/Interface/X245#rx_hpf_corn_freq RX HPF cutoff frequency] |
| | 36 | * Fixed bug when using CM-PLL input / output triggers |
| | 37 | * Introduced new syntax for trigger and interface IDs; refer (see [wiki:WARPLab/Porting#ChangesinWARPLab7.6 Porting guide] for more information) |
| | 38 | * Cleaned up C code and added more comments |
| | 39 | * Cleaned up M code examples |
| | 40 | ---- |
| | 41 | |
| | 42 | |
| | 43 | |
| 54 | | == 7.5.0 Release: == |
| 55 | | '''Download: [http://warpproject.org/dl/refdes/warplab/v7/release/WARPLab_Reference_Design_7.5.0.zip WARPLab_Reference_Design_7.5.0.zip]''' |
| 56 | | |
| 57 | | Release Details: |
| 58 | | ||= Hardware =||= Release =||= Date Posted =||= SVN Rev. =||= ISE Ver. =||= Arch =||= MATLAB Ver. =||= RF Interface Support =|| |
| 59 | | || WARP v3 || 7.5.0 || 11-Feb-2015 || [browser:ResearchApps/PHY/WARPLAB/WARPLab7?rev=4388 4388] || 14.4 || MB/AXI || 2009b or later || 1-2: WARP v3 on-board interfaces [[BR]] 3-4: Requires [wiki:HardwareUsersGuides/FMC-RF-2X245 FMC-RF-2X245] || |
| 60 | | || WARP v2 || 7.5.0 |||||||||||||| Coming Soon || |
| 61 | | |
| 62 | | WARPLab 7.5 for WARP v3 adds support for storing Tx/Rx samples in the on-board 2GB DRAM. Using the DRAM enables Tx and Rx waveforms with more than 1000x the number of samples as previous WARPLab releases. See the [wiki:../BufferSizes Sample Buffer Sizes] page for details on the new waveform length limits. |
| 63 | | |
| 64 | | We extend our thanks to [https://www.seemoo.tu-darmstadt.de/team/matthias-schulz/ Matthias Schulz at TU Darmstadt] for sharing results from his early exploration of a DRAM-enabled WARPLab design. The success of this approach in his application provided the impetus for re-designing the WARPLab FPGA architecture to support DRAM-backed sample buffers for all RF interfaces in the official reference design. |
| 65 | | |
| 66 | | Other changes: |
| 67 | | |
| 68 | | * Updated the [wiki:WARPLab/Porting#NewScriptConventionsinWARPLab7.5andBeyond Porting Guide] with new scripting conventions. In 7.5, these changes are optional so old scripts will work as-is. In future releases, these changes will be enforced. |
| 69 | | * Updates to the [wiki:WARPLab/FPGAArchitecture/WARPLAB_7_5_0 FPGA Architecture]. |
| 70 | | * Replaced the old WARPLab AGC core with a new core derived from the wlan_agc core in the 802.11 Reference Design. The System Generator model for the new core is available in the repository: [browser:ResearchApps/PHY/WARPLAB/WARPLab7/Sysgen_Reference/w3/warplab_agc_v3 warplab_agc_v3]. |
| 71 | | * Updated to version 3.04.a of the WARPXilnet library - be sure to update your [wiki:edk_user_repository edk_user_repository] before compiling the reference software project |
| 72 | | * Added new spectrogram Rx example ([wiki:WARPLab/Examples/Spectrogram WARPLab Spectrogram Example]) |
| 73 | | * Updated all other examples to adopt new conventions for setting Tx/Rx waveform lengths |
| 74 | | * Added support for receiving Ethernet triggers on ETH B on WARP v3 hardware |
| 75 | | * Tweaked mex auto-compilation code to not require specific version of Microsoft tools |
| 76 | | * Updated mapping of debug pins - see the WARPLab [wiki:../HardwareConfiguration/WARPv3 WARP v3 hardware] usage for details |
| 77 | | * Added support for the CM-PLL clock module |
| 78 | | * Upgraded to the latest [wiki:cores/w3_clock_controller w3_clock_controller_axi] core |
| 79 | | * WARPLab assumes you have not written custom clock configurations to the EEPROM (see [wiki:cores/w3_clock_controller#Pre-BootConfiguration w3_clock_controller]). If you have customized the clock configurations in the EEPROM be sure to update {{{node_clk_initialize()}}} in [browser:/ResearchApps/PHY/WARPLAB/WARPLab7/C_Code_Reference/wl_node.c#L544 wl_node.c] to match. |
| 80 | | * '''NOTE:''' the updated core changes the interpretation of the clock module switches! See the WARPLab [wiki:../HardwareConfiguration/WARPv3 WARP v3 hardware] usage page for details on the new interpretation of the CM-PLL and CM-MMCX switches. |
| 81 | | * Added trigger inputs/outputs for the CM-PLL board-to-board cables. The 4 inputs and 4 outputs mirror the corresponding trigger signals on the debug header. |
| 82 | | * Updated all examples to explicitly configure trigger inputs/outputs. User scripts should mimic this approach of not relying on the at-boot default trigger configurations. |
| 83 | | ---- |
| 84 | | |
| 85 | | |
| 86 | | |
| 87 | | |
