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= WARPLab 7: Downloads =

'''Download Latest Reference Design: [http://warp.rice.edu/dl/refdes/warplab/v7/release/WARPLab_Reference_Design_7.0.0.zip WARPLab_Reference_Design_7.0.0.zip]'''

Release Details:
||= Hardware =||= Release =||= Date Posted =||= SVN Rev. =||= ISE Ver. =||= Arch =||=  MATLAB Ver.  =||=  RF Interface Support =||
||  WARP v3  ||  7.0.0  ||  28-Mar-2013  ||  [browser:ResearchApps/PHY/WARPLAB/WARPLab7?rev=1995 1995]  ||  14.4  ||  MB/AXI  ||  2009b or later  || 1-2: WARP v3 on-board interfaces [[BR]] 3-4: Requires [wiki:HardwareUsersGuides/FMC-RF-2X245 FMC-RF-2X245] ||

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The WARPLab FPGA design is built with the Xilinx Embedded Development Kit (EDK) software. The hardware design is constructed and implemented in EDK Xilinx Platform Studio (XPS). The software design, running in the MicroBlaze processor, is built in the Xilinx SDK. The XPS and SDK projects are available in the EDK project .zip files below.

Opening these EDK projects requires a current copy of the [wiki:edk_user_repository WARP edk_user_repository].

If you want to use (but not modify) the reference FPGA design, you only need a bitstream and the reference M code. If you want to modify the MicroBlaze C code, you can download the EDK project below but only modify the SDK project contained therein. To modify the FPGA hardware design, you will need to modify the XPS project. The WARPLab FPGA design uses custom peripherals designed in Xilinx System Generator, including the warplab_buffers core. You will need MATLAB, Simulink and System Generator to modify these cores.