[[TracNav(WARPLab/TOC)]] = Hardware Configuration = == System Requirements == * Review the [wiki:../Requirements WARPLab 7 System Requirements] == WARP v3 == [[Image(WARP_v3_labelled.png)]] === Radio Interface === * In the 2 RF Node configuration (ie only RF A and RF B are populated), you should only use the '''2RF bitstream''' in the [wiki:WARPLab/Downloads download]. * In the 4 RF Node configuration (ie all RF interfaces are populated), you should only use the '''4RF bitstream''' in the [wiki:WARPLab/Downloads download]. === Dip Switches === * In WARPLab 7.1 and later, the dip switch value of 0xF (ie all switches set to '1'), is reserved for [wiki:WARPLab/Reference/NodesConfig dynamic node configuration]. === Debug Header === The [wiki:HardwareUsersGuides/WARPv3/DebugHeader debug header] is configured by default to map to the following pins: [[Image(Debug_Header_Diagram.png)]] || [[Image(wiki:HardwareUsersGuides/WARPv3/files:important.png,nolink,valign=middle)]] || '''These pins are not 3.3v compatible! ''' You must use external level shifting to interface with non-2.5v signals. || [[Image(Debug_Header_Connections.png)]] '''NOTE:''' The Debug Header is defined in the system.ucf and the connections are defined in the system.mhs * The Trigger output and Trigger input pins above are used with the [wiki:WARPLab/Reference/TriggerManager Trigger Manager] === Clock Configuration === * Detailed information on the WARP v3 Clocking configuration can be found [wiki:HardwareUsersGuides/WARPv3/Clocking here]. * To adjust the [wiki:HardwareUsersGuides/CM-MMCX MMCX Clock Module] functionality, please use the following SIP switch settings: [[Image(MMCX_v1_labelled.png)]] === Ethernet === * By default, only Ethernet connection A (Eth A) is used. == WARP v2 == [[Image(WARP_v2_labelled.png)]] === Radio Interface === * In the 2 RF Node configuration (ie only RF A and RF B are populated), you should only use the '''2RF bitstream''' in the [wiki:WARPLab/Downloads download]. * In the 4 RF Node configuration (ie all RF interfaces are populated), you should only use the '''4RF bitstream''' in the [wiki:WARPLab/Downloads download]. === Debug Header === The [wiki:HardwareUsersGuides/FPGABoard_v2.2/OtherIO#DigitalIO debug header] is configured by default to map to the following pins: [[Image(Debug_Header_Diagram_BnW.png)]] === Clock Configuration === * Detailed information on the WARP v2 Clocking configuration can be found [wiki:HardwareUsersGuides/FPGABoard_v2.2/Clocking here]. * To adjust the [wiki:HardwareUsersGuides/ClockBoard_v1.1] === Ethernet === * Only one Ethernet connection (Eth A) on the board