Changes between Version 25 and Version 26 of WARPLab6/Changelog
- Timestamp:
- Sep 3, 2012, 3:30:18 PM (12 years ago)
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WARPLab6/Changelog
v25 v26 43 43 * Added a new WARPLab command to verify network settings from within Matlab. If it even seems like WARPLab isn't working, simply run warplab_networkCheck(N) from the Matlab command line (where N is the number of nodes in your setup). This will run a series of diagnoses to help figure out what the problem is. 44 44 * We introduced a bug in the prior 6.1 release that made the processing of sync packets jittery. This has been fixed in this release. 45 == '''Notes for v6.1''' ''Posted July 2012'' == 45 == '''Notes for v6.1''' ''Posted July 2012'' == 46 WARP v2 EDK Download: [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v06_01_FPGAv2.zip 2 Radio],[http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v06_01_FPGAv2.zip 4 Radio] 47 48 WARP v1 EDK Download: [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v06_01_FPGAv1.zip 2 Radio],[http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v06_01_FPGAv1.zip 4 Radio] 46 49 * Small, but important, bug fix. MAC addresses for each node were not updated based on dip switch value. This made any setup larger than 1 node fail due to arp table collisions. This has been resolved. v6.0 is deprecated and should not be used 47 * '''Notes for v6.0''' ''Posted July 2012'' 50 == '''Notes for v6.0''' ''Posted July 2012'' == 51 WARP v2 EDK Download: [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v06_00_FPGAv2.zip 2 Radio],[http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v06_00_FPGAv2.zip 4 Radio] 52 53 WARP v1 EDK Download: [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v06_00_FPGAv1.zip 2 Radio],[http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v06_00_FPGAv1.zip 4 Radio] 48 54 * Design defaults to using gigabit Ethernet on WARP v2 Hardware (Virtex-4) 49 55 * Improved packet handling on WARP v2 for fewer packet drops … … 52 58 * Thanks to a modified pnet for Matlab's UDP handling, WARPLab is sped by ~10x 53 59 == '''Notes for v5.2''' ''Posted December 2009'' == 54 WARP v2 EDK Download: [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v0 6_01_FPGAv2.zip 2 Radio],[http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v06_01_FPGAv2.zip 4 Radio]60 WARP v2 EDK Download: [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v05_02_FPGAv2.zip 2 Radio],[http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v05_02_FPGAv2.zip 4 Radio] 55 61 56 WARP v1 EDK Download: [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v0 6_01_FPGAv1.zip 2 Radio],[http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v06_01_FPGAv1.zip 4 Radio]62 WARP v1 EDK Download: [http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_2x2_v05_02_FPGAv1.zip 2 Radio],[http://warp.rice.edu/bigFiles/WARPLab_ReferenceDesign_4x4_v05_02_FPGAv1.zip 4 Radio] 57 63 * Can store RSSI data in the 4x4 design 58 64 * Consolidated the Sysgen models. Now there is one Sysgen model, {{{warplab_mimo_4x4.mdl}}}, that implements the full system: 4 radios with I/Q and RSSI buffers. The 2x2 MIMO and 4x4 MIMO [wiki:WARPLab/RefDesign Reference Designs] are identical except the 2x2 Design leaves two paths of the model unconnected.