33 | | The ref design XPS project is at the root of the expanded .zip file, in the directory with the {{{system.xmp}}} and {{{system.mhs}}} files. Open {{{system.xmp}}} in XPS to explore or modify the XPS project. |
34 | | |
35 | | The project archive does not include the intermediate hardware implementation files (the {{{synthesis/}}}, {{{hdl/}}} and {{{implementation/}}} folders). These will be re-generated if you initiate the 'Generate Bitstream' process. However, this is '''not''' necessary if you only want to iterate on software. For this, refer to the SDK project instructions below. |
| 34 | The ref design XPS project is at the root of the expanded .zip file, in the directory with the {{{system.xmp}}} and {{{system.mhs}}} files. Open {{{system.xmp}}} in XPS to explore or modify the XPS project. It is not required to build the hardware project to iterate on software projects. The Xilinx SDK can modify software on top of those downloaded XPS project without needing to rebuild the hardware project. |