Changes between Version 1 and Version 2 of cores/w3_ad_controller


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Timestamp:
Aug 12, 2012, 1:17:28 PM (12 years ago)
Author:
murphpo
Comment:

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  • cores/w3_ad_controller

    v1 v2  
    66
    77== Hardware ==
     8
     9The w3_ad_controller HDL implements parallel SPI interfaces, one per RF interface. There are four ports per RF interface (3 SPI, 1 reset) which must be connected to the corresponding FPGA pins. Refer to the WARP v3 reference projects for examples of known-good hardware configurations.
    810
    911The MHS snippet below shows the w3_ad_controller instantiation used in the WARP v3 reference projects. The memory address is intentionally invalid; you must run "Generate Addresses" after adding the core.