= WARP FPGA Cores =


The cores listed below are provided to facilitate use of the various hardware resources on the WARP hardware.

== WARP v3 Cores ==
 * [wiki:./w3_iic_eeprom w3_iic_eeprom]: IIC master for reading/writing EEPROM
 * [wiki:./w3_userio w3_userio]: Controller for all user I/O resources (LEDs, buttons, etc.)
 * [wiki:./w3_ad_controller w3_ad_controller]: Controller for managing RF interface analog converters
 * [wiki:./w3_clock_controller w3_clock_controller]: Controller for managing RF interface clock buffers
 * [wiki:./radio_controller radio_controller]: Controller for managing RF interface transceivers and front-ends

== WARP v2 Cores ==
 * [wiki:./warp_v4_userio warp_v4_userio]: Controller for all user I/O resources (LEDs, buttons, etc.)

== WARP v1 & v2 Cores ==
 * [wiki:HardwareUsersGuides/RadioBoard_v1.4/RadioController radio_controller]: Controller for managing RF interface transceivers and front-ends
 * [wiki:HardwareUsersGuides/RadioBoard_v1.4/RadioBridge radio_bridge]: Connects radio_controller to top-level ports for one Radio Board
 * [wiki:EEPROM_onewire eeprom_onewire]: OneWire master for reading/writing FPGA Board and Radio Board EEPROMs
 * [wiki:./clock_board_config clock_board_config]: Configures Clock Board buffers on power up