Changes between Version 12 and Version 13 of howto/SD_Config


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Timestamp:
Nov 20, 2015, 11:18:10 PM (8 years ago)
Author:
murphpo
Comment:

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  • howto/SD_Config

    v12 v13  
    2020To set the startup clock:
    2121
    22 '''ISE''': Right-click on the "Generate Programming File" process and choose "Process Properties". Click "Startup Options", then change "FPGA Start-Up Clock" to "CCLK". The Startup Options should look like this:
     22'''ISE''': Right-click on the "Generate Programming File" process and choose "Process Properties". Click "Startup Options", then change "FPGA Start-Up Clock" to "CCLK". The Startup Options should look like this:[[BR]]
    2323[[Image(ise_bitgen_cclk.png,nolink)]]
    2424
     
    3838
    3939== Binary Format ==
    40 Once you have a valid .bit file with the correct "Startup Clock" option, it must be converted to a .bit ("binary" format) file. Again, the method depends on your design flow.
     40Once you have a valid .bit file with the correct "Startup Clock" option, it must be converted to a .bin ("binary" format) file. Again, the method depends on your design flow.
    4141
    4242'''ISE''': Right-click on the "Generate Programming File" process and choose "Process Properties". Click "General Options", then check "Create Binary Configuration File". Click OK and re-run the "Generate Programming File" process. This will create a new .bin file in the same directory as the .bit file.