Changes between Version 27 and Version 28 of mgt_ref
- Timestamp:
- Sep 26, 2006, 12:41:44 AM (18 years ago)
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mgt_ref
v27 v28 3 3 The MGT is a flexible, programmable differential serial interface, allowing a multi-gigabit transceiver to be easily integrated into FPGA design. The ROCKETIO MGTS provide full duplex connections and benefits the designer for the ability to operate at any serial bit rate in the range from 600Mb/s to 3.125 GB/s per channel. The WARP can support 8 MGTs at most. So the peak rate is over 20G bit/s, which will meet transmission requirement between boards or chips. 4 4 5 Our design is based on Aurora Core which implements MGT internally. The Aurora Core is provided by Xilinx and is easy to be embedded in one design. The following picture shows the structure of this design. The media stream is packetted and transmitted from one PC to the PPC in one WARP board through Ethernet. Then the PPC send it out to the LINKPORT via RAM or FIFO in IPIF. The LINKPORT has the Aurora Core in it. This LINKPORT transmit data to another LINKPORT through MGT. Then again through another PPC, the data is transmitted to another PC. 6 5 7 [[Image(WARPImages:MGT_ref.jpg)]] 8 9 10 To demo this project, we need 11 1 two WARP board and two computers 12 2 installing the VLC tools on two computers 13 3 downloading the Project tran on sending computer, downloading the project rec on receiving computer 14 4 configuring IP of both the PC for TX and RX as IP 192.168.0.102 15 5 configuring the VLC so that the PC for TX send UDP packet to 192.168.0.5:1234 16 6 configuring the VLC so that the PC for RX should listen to port 4321 17 7 connecting the TX PC and TX WARP by Ethernet cable 18 8 connecting the RX PC and RX WARP by Ethernet cable 19 9 connecting the MGT #5 in TX WARP and RX WARP by MGT cable 20