Changes between Version 1 and Version 2 of ppc_prog_overview/ppc405_arch


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Timestamp:
Aug 2, 2006, 11:34:51 PM (18 years ago)
Author:
snovich
Comment:

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  • ppc_prog_overview/ppc405_arch

    v1 v2  
    2323The Memory Management Unit (MMU) can support up to 4GB of address space and allows for variable page sizes. It also features software control over page-replacement method used. Page sizes can be between 1KB and 16MB.[[BR]][[BR]]
    2424The debug resources allow the PowerPC to be read and controlled (tracing/event triggering). Debugging operations are done through registers, which can be accessed by software or a JTAG interface. Using the JTAG interface, registers can be read and written using XMD, or more advanced control over the PowerPC can be achieved by using ChipScope.[[BR]][[BR]]
    25 The timing mechanism in the PowerPC has a 64bit time base, which three types of timers are able to draw upon – the Programming Interval Timer (PIT), the Fixed Interval Timer (FIT), and the Watchdog Timer (WDT). The PIT is a 32bit countdown timer, which causes an interrupt when its count reaches zero. The FIT causes a binary interrupt when a user-chosen bit in the 64bit time base changes from a 0 to a 1. There four pre-defined bits that may be user may choose from. The WDT has the same functionality as the FIT, but instead of causing an interrupt when a chosen 0 to 1 bit transition occurs, the WDT causes a hardware reset. The user may customize the type of reset that occurs. Timer API and information can be found in the IP Catalog of XPS, under the “Timer” section.[[BR]][[BR]]
     25The timing mechanism in the PowerPC has a 64bit time base, which three types of timers are able to draw upon – the Programming Interval Timer (PIT), the Fixed Interval Timer (FIT), and the Watchdog Timer (WDT). The PIT is a 32bit countdown timer, which causes an interrupt when its count reaches zero. The FIT causes a binary interrupt when a user-chosen bit in the 64bit time base changes from a 0 to a 1. There four pre-defined bits that may be user may choose from. The WDT has the same functionality as the FIT, but instead of causing an interrupt when a chosen 0 to 1 bit transition occurs, the WDT causes a hardware reset. The user may customize the type of reset that occurs. Timer API and information can be found in the IP Catalog of XPS, under the “Timer” section.[[BR]]
     26[[BR]]
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