1 | // Copyright (c) 2006 Rice University |
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2 | // All Rights Reserved |
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3 | // This code is covered by the Rice-WARP license |
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4 | // See http://warp.rice.edu/license/ for details |
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5 | |
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6 | /** |
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7 | * \file radio_controller_basic.c |
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8 | * \brief Code file for the most basic functions that are needed for communication with the radio boards. |
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9 | * |
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10 | * @version 1.09 |
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11 | * @author Siddharth Gupta |
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12 | * |
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13 | * Basic drivers for radio controller. Has all the basic functions related to sending |
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14 | * and receiving bits over the air and changing the center frequency of transmission. |
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15 | */ |
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16 | |
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17 | /***************************** Include Files *******************************/ |
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18 | |
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19 | #include "radio_controller_basic.h" |
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20 | |
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21 | /****************************** Functions **********************************/ |
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22 | |
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23 | /** |
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24 | * @brief Start of time reset function. |
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25 | * |
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26 | * Reset all the radio boards including the radio and DAC chips along with their associated registers. |
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27 | * Goes through a set of instructions to achieve a reset of the radios. This must be called at the start of time |
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28 | * and affects all connected radio boards. |
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29 | * |
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30 | * @param baseaddress Base address of the radio_controller core; usually defined as XPAR_RADIO_CONTROLLER_0_BASEADDR by XPS |
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31 | * @param clkRatio Ratio of bus clock to SPI clock; use 1 for 40MHz bus, 2 for 80MHz bus |
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32 | */ |
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33 | void WarpRadio_v1_Reset(unsigned int* baseaddress, unsigned int clkRatio) { |
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34 | |
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35 | radio_controller_baseaddr = baseaddress; |
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36 | |
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37 | RADIO_CONTROLLER_mWriteSlaveReg5((volatile)radio_controller_baseaddr, 0x3410); // Set the value of the Control Register to 0x00003410 for DACs |
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38 | RADIO_CONTROLLER_mWriteSlaveReg6((volatile)radio_controller_baseaddr, clkRatio); // Set the value for the Divider Register to 0x00000001 |
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39 | |
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40 | RADIO_CONTROLLER_mWriteSlaveReg7((volatile)radio_controller_baseaddr, (SLAVEMASKDAC & (RADIO1_ADDR | RADIO2_ADDR | RADIO3_ADDR | RADIO4_ADDR))); // Select all DACs |
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41 | |
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42 | RADIO_CONTROLLER_mWriteSlaveReg1((volatile)radio_controller_baseaddr, RAD_TX_DAC_RESET_MASK); // Turn on DacReset |
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43 | RADIO_CONTROLLER_mWriteSlaveReg1((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg1((volatile)radio_controller_baseaddr) & ~(RAD_TX_DAC_RESET_MASK))); // Turn off DacReset |
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44 | |
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45 | transmitdac(0x0004); // Transmit a value of 0x04 for Register 0 for DAC to use only 1 refernce register |
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46 | |
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47 | |
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48 | RADIO_CONTROLLER_mWriteSlaveReg5((volatile)radio_controller_baseaddr, 0x3412); // Set the value of the Control Register to 0x00003412 for Radio |
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49 | RADIO_CONTROLLER_mWriteSlaveReg6((volatile)radio_controller_baseaddr, clkRatio-1); // Set the value for the Divider Register to 0x00000000 |
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50 | |
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51 | RADIO_CONTROLLER_mWriteSlaveReg7((volatile)radio_controller_baseaddr, (SLAVEMASK & (RADIO1_ADDR | RADIO2_ADDR | RADIO3_ADDR | RADIO4_ADDR))); // Select the radios that will be affected by this function call in store in Slave Select |
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52 | |
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53 | // Go through reset procedure |
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54 | RADIO_CONTROLLER_mWriteSlaveReg0((volatile)radio_controller_baseaddr, ~(RAD_SHDN_MASK | RAD_SHDN_CON_MASK | RAD_TXEN_MASK | RAD_TXEN_CON_MASK | RAD_RXEN_MASK | RAD_RXEN_CON_MASK | RAD_RXHP_MASK | RAD_RXHP_CON_MASK)); |
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55 | RADIO_CONTROLLER_mWriteSlaveReg0((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg0((volatile)radio_controller_baseaddr) | RAD_SHDN_MASK)); // Asset Shutdown |
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56 | RADIO_CONTROLLER_mWriteSlaveReg0((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg0((volatile)radio_controller_baseaddr) | (RAD_TXEN_MASK | RAD_RXEN_MASK))); // Enable Rx and Tx |
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57 | RADIO_CONTROLLER_mWriteSlaveReg0((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg0((volatile)radio_controller_baseaddr) & ~(RAD_TXEN_MASK | RAD_RXEN_MASK))); // Disable Rx and Tx |
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58 | RADIO_CONTROLLER_mWriteSlaveReg0((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg0((volatile)radio_controller_baseaddr) & ~RAD_SHDN_MASK)); // De-asset Shutdown |
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59 | |
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60 | // Start initialization |
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61 | RADIO_CONTROLLER_mWriteSlaveReg0((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg0((volatile)radio_controller_baseaddr) | RAD_RXHP_CON_MASK)); // Set RxHP control to HW |
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62 | RADIO_CONTROLLER_mWriteSlaveReg1((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg1((volatile)radio_controller_baseaddr) | RAD_24PA_MASK)); // Antsw[1] to 1 and enable 2.4GHz amplifier |
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63 | RADIO_CONTROLLER_mWriteSlaveReg1((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg1((volatile)radio_controller_baseaddr) & ~RAD_ADC_RX_DCS_MASK)); // DCS to 0 |
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64 | RADIO_CONTROLLER_mWriteSlaveReg2((volatile)radio_controller_baseaddr, 0x00000000 & ~(RAD_ADC_RX_PWDNA_MASK | RAD_ADC_RX_PWDNB_MASK | RAD_RSSI_ADC_SLEEP_MASK)); // Enable all ADCs |
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65 | |
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66 | transmit(0x0C218); // Set value of 0x0C21 to register 8 in the radio |
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67 | REG_RAD1_RX_CONTROL = (short)0x0C21; // Update local copies of the registers in the radio |
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68 | REG_RAD2_RX_CONTROL = (short)0x0C21; |
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69 | REG_RAD3_RX_CONTROL = (short)0x0C21; |
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70 | REG_RAD4_RX_CONTROL = (short)0x0C21; |
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71 | |
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72 | // Setup for 20MHz radio reference clock |
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73 | transmit(0x18225); |
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74 | REG_RAD1_BAND_SELECT = (short)0x1822; |
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75 | REG_RAD2_BAND_SELECT = (short)0x1822; |
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76 | REG_RAD3_BAND_SELECT = (short)0x1822; |
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77 | REG_RAD4_BAND_SELECT = (short)0x1822; |
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78 | |
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79 | // Setup for 40MHz radio reference clock |
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80 | //transmit(0x18245); |
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81 | //REG_RAD1_BAND_SELECT = (short)0x1824; |
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82 | //REG_RAD2_BAND_SELECT = (short)0x1824; |
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83 | //REG_RAD3_BAND_SELECT = (short)0x1824; |
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84 | //REG_RAD4_BAND_SELECT = (short)0x1824; |
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85 | |
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86 | unsigned int reg2 = REG_RAD1_STANDBY | 0x2000; |
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87 | transmit(((reg2<<4)+0x0002)); |
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88 | REG_RAD1_STANDBY = (short)reg2; |
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89 | REG_RAD2_STANDBY = (short)reg2; |
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90 | REG_RAD3_STANDBY = (short)reg2; |
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91 | REG_RAD4_STANDBY = (short)reg2; |
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92 | |
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93 | unsigned int reg5 = REG_RAD1_BAND_SELECT | 0x2000; |
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94 | transmit(((reg5<<4)+0x0005)); |
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95 | REG_RAD1_BAND_SELECT = (short)reg5; |
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96 | REG_RAD2_BAND_SELECT = (short)reg5; |
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97 | REG_RAD3_BAND_SELECT = (short)reg5; |
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98 | REG_RAD4_BAND_SELECT = (short)reg5; |
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99 | |
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100 | unsigned int reg9 = REG_RAD1_TX_LINEARITY | 0x0003; |
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101 | transmit(((reg9<<4)+0x0009)); |
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102 | REG_RAD1_TX_LINEARITY = (short)reg9; |
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103 | REG_RAD2_TX_LINEARITY = (short)reg9; |
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104 | REG_RAD3_TX_LINEARITY = (short)reg9; |
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105 | REG_RAD4_TX_LINEARITY = (short)reg9; |
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106 | |
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107 | //Setup the deault TxTiming values for all four radios |
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108 | //Field assignments in these four registers (everything endian-swapped): |
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109 | // bits[0:7]: delay for gain ramp start (default = 100 cycles) |
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110 | // bits[8:15] delay for power amp start (default = 0 cycles) |
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111 | // bits[16:23] delay for radio TxEn start (default = 0 cycles) |
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112 | RADIO_CONTROLLER_mWriteSlaveReg13((volatile)radio_controller_baseaddr,(unsigned int)( (100 << 24) + (0 << 16) + (0 << 8) ) ); |
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113 | RADIO_CONTROLLER_mWriteSlaveReg14((volatile)radio_controller_baseaddr,(unsigned int)( (100 << 24) + (0 << 16) + (0 << 8) ) ); |
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114 | RADIO_CONTROLLER_mWriteSlaveReg15((volatile)radio_controller_baseaddr,(unsigned int)( (100 << 24) + (0 << 16) + (0 << 8) ) ); |
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115 | RADIO_CONTROLLER_mWriteSlaveReg16((volatile)radio_controller_baseaddr,(unsigned int)( (100 << 24) + (0 << 16) + (0 << 8) ) ); |
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116 | |
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117 | //Setup the deault TxGainTiming values for all four radios |
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118 | // bits[0:5]: target gain (default = 0x3f = max Tx gain) |
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119 | // bits[6:9]: gain step (default = 0xF = max gain step) |
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120 | // bits[10:13]: gain time step (default = 2 = min gain time step) |
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121 | // bits[16:27]: delay for TxStart (default = 200 cycles) |
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122 | RADIO_CONTROLLER_mWriteSlaveReg9((volatile)radio_controller_baseaddr,(unsigned int)((0x3F << 26) | (0xF << 22) | ((2) << 18) | (200 << 4))); |
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123 | RADIO_CONTROLLER_mWriteSlaveReg10((volatile)radio_controller_baseaddr,(unsigned int)((0x3F << 26) | (0xF << 22) | ((2) << 18) | (200 << 4))); |
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124 | RADIO_CONTROLLER_mWriteSlaveReg11((volatile)radio_controller_baseaddr,(unsigned int)((0x3F << 26) | (0xF << 22) | ((2) << 18) | (200 << 4))); |
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125 | RADIO_CONTROLLER_mWriteSlaveReg12((volatile)radio_controller_baseaddr,(unsigned int)((0x3F << 26) | (0xF << 22) | ((2) << 18) | (200 << 4))); |
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126 | |
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127 | return; |
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128 | } |
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129 | |
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130 | /** |
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131 | * @brief Enable transmit mode on radios. |
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132 | * |
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133 | * Enables the transmit enable mode on the radios specified. Before transmit is turned on the recieve |
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134 | * mode is turned off. Enables the TxEnable state machine that also controls turning on of the amplifiers. |
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135 | * |
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136 | * @param radios Refers to the radios in the slots whose transmit mode is turned on. |
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137 | */ |
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138 | void WarpRadio_v1_TxEnable(unsigned int radios) { |
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139 | |
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140 | unsigned int tmpReg = 0; |
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141 | |
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142 | //Swap the antenna switch to map the Tx port to antenna port 1 |
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143 | RADIO_CONTROLLER_mWriteSlaveReg1((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg1((volatile)radio_controller_baseaddr) | (radios & RAD_ANTSW_MASK))); |
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144 | |
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145 | //Read the current radio controller Tx/Rx mode register into a temporary variable |
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146 | tmpReg = RADIO_CONTROLLER_mReadSlaveReg0((volatile)radio_controller_baseaddr); |
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147 | |
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148 | //De-assert the RxEnable bits for the selected radios (no harm if they're already disabled) |
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149 | tmpReg = tmpReg & ~(radios & RAD_RXEN_MASK); |
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150 | |
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151 | //Assert the TxEnable bits for the selected radios (no harm if they're already enabled) |
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152 | tmpReg = tmpReg | (radios & RAD_TXEN_MASK); |
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153 | |
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154 | //Write the update register contents back to the radio controller |
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155 | RADIO_CONTROLLER_mWriteSlaveReg0((volatile)radio_controller_baseaddr, tmpReg); |
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156 | |
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157 | return; |
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158 | } |
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159 | |
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160 | |
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161 | /** |
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162 | * @brief Enable recieve mode on radios. |
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163 | * |
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164 | * Enables the recieve mode in the radio board. On calling this function the transmit mode is forcibly turned off. |
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165 | * |
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166 | * @param radios Refers to the radios in the slots that will have their recieve mode turned on. |
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167 | */ |
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168 | void WarpRadio_v1_RxEnable(unsigned int radios) { |
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169 | |
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170 | unsigned int tmpReg = 0; |
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171 | |
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172 | //Swap the antenna switch to map the Rx port to antenna port 1 |
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173 | RADIO_CONTROLLER_mWriteSlaveReg1((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg1((volatile)radio_controller_baseaddr) & ~(radios & RAD_ANTSW_MASK))); |
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174 | |
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175 | //Read the current radio controller Tx/Rx mode register into a temporary variable |
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176 | tmpReg = RADIO_CONTROLLER_mReadSlaveReg0((volatile)radio_controller_baseaddr); |
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177 | |
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178 | //De-assert the TxEnable bits for the selected radios (no harm if they're already disabled) |
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179 | tmpReg = tmpReg & ~(radios & RAD_TXEN_MASK); |
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180 | |
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181 | //Assert the RxEnable bits for the selected radios (no harm if they're already enabled) |
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182 | tmpReg = tmpReg | (radios & RAD_RXEN_MASK); |
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183 | |
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184 | //Write the update register contents back to the radio controller |
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185 | RADIO_CONTROLLER_mWriteSlaveReg0((volatile)radio_controller_baseaddr, tmpReg); |
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186 | |
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187 | return; |
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188 | } |
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189 | |
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190 | /** |
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191 | * @brief Disable transmit or receive mode. |
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192 | * |
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193 | * Disables the receive and/or transmit modes in the radios specified. |
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194 | * |
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195 | * @param radios Refers to the radios in the slots that are affected. |
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196 | */ |
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197 | void WarpRadio_v1_TxRxDisable(unsigned int radios) { |
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198 | |
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199 | RADIO_CONTROLLER_mWriteSlaveReg0((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg0((volatile)radio_controller_baseaddr) & ~(radios & (RAD_TXEN_MASK | RAD_RXEN_MASK)))); // Disable Tx and Rx |
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200 | } |
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201 | |
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202 | /** |
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203 | * @brief Tune the radio to a frequency in the 2.4GHz band. |
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204 | * |
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205 | * Function used to shift the center frequency on the radio within the 2.4GHz band. Also enables the |
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206 | * 2.4GHz amplifier for the transmit state machine. |
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207 | * -# 2412MHz |
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208 | * -# 2417MHz |
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209 | * -# 2422MHz |
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210 | * -# 2427MHz |
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211 | * -# 2432MHz |
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212 | * -# 2437MHz |
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213 | * -# 2442MHz |
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214 | * -# 2447MHz |
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215 | * -# 2452MHz |
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216 | * -# 2457MHz |
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217 | * -# 2462MHz |
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218 | * -# 2467MHz |
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219 | * -# 2472MHz |
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220 | * -# 2484MHz |
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221 | * |
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222 | * @param freqset The frequency channel to use, selected from above list |
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223 | * @param radios Defines which radios are affected by this function call. |
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224 | * @return Returns INVALID_FREQ if given frequency set is not valid. |
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225 | */ |
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226 | int WarpRadio_v1_SetCenterFreq2GHz(char freqset, unsigned int radios) { |
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227 | |
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228 | RADIO_CONTROLLER_mWriteSlaveReg7((volatile)radio_controller_baseaddr, (SLAVEMASK & radios)); // Select Radios affected by this function |
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229 | |
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230 | unsigned int reg3; |
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231 | unsigned int reg4; |
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232 | unsigned int reg5; |
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233 | int retval; // Return value from the function |
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234 | unsigned int mask2g = 0xFF3E; // Mask to set frequency band to 2.4Ghz |
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235 | |
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236 | switch(freqset) { // Switch on the frequency set given as input. |
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237 | case(1) : { |
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238 | reg3 = 0x00A03; // Set a value of 0x00A0 for Register 3 |
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239 | reg4 = 0x33334; // Set a value of 0x3333 for Register 4 |
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240 | retval = 2412; // Set the return value to the frequency that has been set. |
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241 | break; |
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242 | } |
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243 | case(2) : { |
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244 | reg3 = 0x20A13; |
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245 | reg4 = 0x08884; |
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246 | retval = 2417; |
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247 | break; |
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248 | } |
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249 | case(3) : { |
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250 | reg3 = 0x30A13; |
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251 | reg4 = 0x1DDD4; |
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252 | retval = 2422; |
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253 | break; |
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254 | } |
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255 | case(4) : { |
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256 | reg3 = 0x00A13; |
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257 | reg4 = 0x33334; |
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258 | retval = 2427; |
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259 | break; |
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260 | } |
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261 | case(5) : { |
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262 | reg3 = 0x20A23; |
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263 | reg4 = 0x08884; |
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264 | retval = 2432; |
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265 | break; |
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266 | } |
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267 | case(6) : { |
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268 | reg3 = 0x30A23; |
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269 | reg4 = 0x1DDD4; |
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270 | retval = 2437; |
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271 | break; |
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272 | } |
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273 | case(7) : { |
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274 | reg3 = 0x00A23; |
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275 | reg4 = 0x33334; |
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276 | retval = 2442; |
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277 | break; |
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278 | } |
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279 | case(8) : { |
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280 | reg3 = 0x20A33; |
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281 | reg4 = 0x08884; |
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282 | retval = 2447; |
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283 | break; |
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284 | } |
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285 | case(9) : { |
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286 | reg3 = 0x30A33; |
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287 | reg4 = 0x1DDD4; |
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288 | retval = 2452; |
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289 | break; |
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290 | } |
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291 | case(10) : { |
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292 | reg3 = 0x00A33; |
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293 | reg4 = 0x33334; |
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294 | retval = 2457; |
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295 | break; |
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296 | } |
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297 | case(11) : { |
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298 | reg3 = 0x20A43; |
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299 | reg4 = 0x08884; |
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300 | retval = 2462; |
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301 | break; |
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302 | } |
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303 | case(12) : { |
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304 | reg3 = 0x30A43; |
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305 | reg4 = 0x1DDD4; |
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306 | retval = 2467; |
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307 | break; |
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308 | } |
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309 | case(13) : { |
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310 | reg3 = 0x00A43; |
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311 | reg4 = 0x33334; |
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312 | retval = 2472; |
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313 | break; |
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314 | } |
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315 | case(14) : { |
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316 | reg3 = 0x10A53; |
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317 | reg4 = 0x26664; |
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318 | retval = 2484; |
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319 | break; |
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320 | } |
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321 | default : { |
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322 | retval = INVALID_FREQ; |
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323 | } |
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324 | } |
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325 | |
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326 | if(retval != -1) { // Check if an invalid freqency set has been provided and if so do not change freqency |
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327 | |
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328 | transmit(reg3); // Transmit the new register 3 value |
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329 | transmit(reg4); // Transmit the new register 4 value |
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330 | |
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331 | reg3 = reg3>>4; // Bit shift the register values to the right and remove the register number from the |
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332 | reg4 = reg4>>4; // value. |
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333 | |
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334 | if((radios & RAD1MASK) > 0) { // Check if the Slave is in use |
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335 | |
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336 | reg5 = REG_RAD1_BAND_SELECT & mask2g; // Pick up local copy of the register and set the band to 2.4Ghz |
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337 | |
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338 | transRadio(0x0001, ((reg5<<4)+0x0005)); // Transmit new register 5 value and add the register number as last 4 bits |
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339 | |
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340 | REG_RAD1_BAND_SELECT = (short)reg5; // Set local copies of registers to new values. |
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341 | REG_RAD1_INTEGER_DIVIDER_RATIO = (short)reg3; |
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342 | REG_RAD1_FRACTIONAL_DIVIDER_RATIO = (short)reg4; |
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343 | } |
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344 | if((radios & RAD2MASK) > 0) { // Check if the Slave is in use |
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345 | |
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346 | reg5 = REG_RAD2_BAND_SELECT & mask2g; // Pick up local copy of the register and set the band to 2.4Ghz |
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347 | |
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348 | transRadio(0x0002, ((reg5<<4)+0x0005)); // Transmit new register 5 value and add the register number as last 4 bits |
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349 | |
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350 | REG_RAD2_BAND_SELECT = (short)reg5; // Set local copies of registers to new values. |
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351 | REG_RAD2_INTEGER_DIVIDER_RATIO = (short)reg3; |
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352 | REG_RAD2_FRACTIONAL_DIVIDER_RATIO = (short)reg4; |
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353 | } |
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354 | if((radios & RAD3MASK) > 0) { // Check if the Slave is in use |
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355 | |
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356 | reg5 = REG_RAD3_BAND_SELECT & mask2g; // Pick up local copy of the register and set the band to 2.4Ghz |
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357 | |
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358 | transRadio(0x0004, ((reg5<<4)+0x0005)); // Transmit new register 5 value and add the register number as last 4 bits |
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359 | |
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360 | REG_RAD3_BAND_SELECT = (short)reg5; // Set local copies of registers to new values. |
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361 | REG_RAD3_INTEGER_DIVIDER_RATIO = (short)reg3; |
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362 | REG_RAD3_FRACTIONAL_DIVIDER_RATIO = (short)reg4; |
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363 | } |
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364 | if((radios & RAD4MASK) > 0) { // Check if the Slave is in use |
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365 | |
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366 | reg5 = REG_RAD4_BAND_SELECT & mask2g; // Pick up local copy of the register and set the band to 2.4Ghz |
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367 | |
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368 | transRadio(0x0008, ((reg5<<4)+0x0005)); // Transmit new register 5 value and add the register number as last 4 bits |
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369 | |
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370 | REG_RAD4_BAND_SELECT = (short)reg5; // Set local copies of registers to new values. |
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371 | REG_RAD4_INTEGER_DIVIDER_RATIO = (short)reg3; |
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372 | REG_RAD4_FRACTIONAL_DIVIDER_RATIO = (short)reg4; |
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373 | } |
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374 | } |
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375 | |
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376 | |
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377 | RADIO_CONTROLLER_mWriteSlaveReg1((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg1((volatile)radio_controller_baseaddr) & ~(radios & RAD_5PA_MASK))); // Disable 5GHz amp |
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378 | RADIO_CONTROLLER_mWriteSlaveReg1((volatile)radio_controller_baseaddr, (RADIO_CONTROLLER_mReadSlaveReg1((volatile)radio_controller_baseaddr) | (radios & RAD_24PA_MASK))); // Enable 2.4GHz amp |
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379 | |
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380 | return retval; // Return either the new freqency that has been set or return -1 to indicate that the frequency set given was invalid |
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381 | } |
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382 | |
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383 | |
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384 | /** |
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385 | * @brief Read DIPSW of a radio. |
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386 | * |
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387 | * Returns the DIPSW values of the radio specified. Can return value for only one of the radios at one time. |
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388 | * |
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389 | * @param radio Radio from which to read the value. |
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390 | */ |
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391 | char WarpRadio_v1_DIPSW(unsigned int radio) { |
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392 | |
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393 | if((radio & RAD1MASK) > 0) { // Check to make sure if Radio 1 is being used |
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394 | return ((RADIO_CONTROLLER_mReadSlaveReg3((volatile)radio_controller_baseaddr) & RAD_DIPSW_L_MASK) >> 10); |
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395 | } |
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396 | else if((radio & RAD2MASK) > 0) { // Check to make sure if Radio 2 is being used |
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397 | return ((RADIO_CONTROLLER_mReadSlaveReg3((volatile)radio_controller_baseaddr) & RAD_DIPSW_H_MASK) >> 26); |
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398 | } |
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399 | else if((radio & RAD3MASK) > 0) { // Check to make sure if Radio 3 is being used |
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400 | return ((RADIO_CONTROLLER_mReadSlaveReg4((volatile)radio_controller_baseaddr) & RAD_DIPSW_L_MASK) >> 10); |
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401 | } |
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402 | else if((radio & RAD4MASK) > 0) { // Check to make sure if Radio 4 is being used |
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403 | return ((RADIO_CONTROLLER_mReadSlaveReg4((volatile)radio_controller_baseaddr) & RAD_DIPSW_H_MASK) >> 26); |
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404 | } |
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405 | else { |
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406 | return 0; |
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407 | } |
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408 | } |
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409 | |
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410 | /** |
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411 | * @brief Adjust DC offset for DAC. |
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412 | * |
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413 | * Adjust the DC Offset on the I and Q channels of the DAC. Only the I or Q can be adjusted at one time. |
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414 | * Value must be within the defined range to be correctly written to the DAC registers. |
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415 | * |
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416 | * @param chan ICHAN or QCHAN, referring to the I channel or the Q channel. |
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417 | * @param value DC offset value to be written. Ranges from -1023 to 1024. |
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418 | * @param radios Radios that have their offset value set. |
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419 | * @return INVALID_MODE if the mode is incorrect, OUT_OF_RANGE is the value given |
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420 | * is out of the range that can be supported, WARP_SUCCESS if successful change. |
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421 | */ |
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422 | int WarpRadio_v1_DACOffsetAdj(char chan, short value, unsigned int radios) { |
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423 | |
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424 | RADIO_CONTROLLER_mWriteSlaveReg5((volatile)radio_controller_baseaddr, 0x3410); // Set the value of the Control Register to 0x00003410 for DACs |
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425 | RADIO_CONTROLLER_mWriteSlaveReg6((volatile)radio_controller_baseaddr, 0x00000001); // Set the value for the Divider Register to 0x00000001 |
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426 | |
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427 | RADIO_CONTROLLER_mWriteSlaveReg7((volatile)radio_controller_baseaddr, (SLAVEMASKDAC & radios)); // Select the dacs that need to be affected |
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428 | |
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429 | if (value > 1023 || value < -1024) { // Make sure the value is in range. |
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430 | return OUT_OF_RANGE; |
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431 | } |
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432 | |
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433 | short reg8; |
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434 | if (value < 0) { // If the value is negative then store set the first bit of second register |
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435 | reg8 = 0x0080; // to 1 |
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436 | } |
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437 | else { |
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438 | reg8 = 0x0000; // Or if positive set it to 0. |
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439 | } |
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440 | |
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441 | value = abs(value); |
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442 | |
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443 | short reg7 = ((value & 0x03FC) >> 2); // b9:b2 of the value are the 8 bits in the first register |
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444 | reg8 = reg8 + (value & 0x0003); // b1:b0 of the value are the last 2 bits in the second register |
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445 | |
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446 | if (chan == ICHAN) { |
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447 | transmitdac((0x0700 + reg7)); // if I channel then store the first register to Register 7 |
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448 | transmitdac((0x0800 + reg8)); // and the second register to Register 8 |
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449 | } |
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450 | else if (chan == QCHAN) { |
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451 | transmitdac((0x0B00 + reg7)); // if I channel then store the first register to Register B |
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452 | transmitdac((0x0C00 + reg8)); // and the second register to Register C |
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453 | } |
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454 | else { |
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455 | return INVALID_MODE; |
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456 | } |
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457 | |
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458 | RADIO_CONTROLLER_mWriteSlaveReg5((volatile)radio_controller_baseaddr, 0x3412); // Set the value of the Control Register to 0x00003412 for Radio |
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459 | RADIO_CONTROLLER_mWriteSlaveReg6((volatile)radio_controller_baseaddr, 0x00000000); // Set the value for the Divider Register to 0x00000000 |
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460 | |
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461 | return WARP_SUCCESS; |
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462 | } |
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463 | |
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