[4325] | 1 | /*************************************************************** |
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| 2 | * Pseudo-code for PicoBlaze program in w3_clock_controller_axi |
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| 3 | * |
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| 4 | * IMPORTANT: This pseudo code is for reference only. The actual |
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| 5 | * PicoBlaze program is *not* compiled from this code. The program |
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| 6 | * is written directly in assembly. The code below illustrates the |
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| 7 | * basic operation of the assembly program but does not represent |
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| 8 | * the assembly program routine-by-routine. |
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| 9 | * |
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| 10 | * Refer to the w3_clock_controller_axi user guide for more details: |
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| 11 | * http://warpproject.org/trac/wiki/cores/w3_clock_controller |
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| 12 | * |
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| 13 | ****************************************************************/ |
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| 14 | |
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| 15 | main() { |
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| 16 | |
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| 17 | if(no_clock_module_mounted) { |
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| 18 | load_configuration(DEV_RF_REF, CFG_NOCM) |
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| 19 | load_configuration(DEV_SAMP, CFG_NOCM) |
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| 20 | load_configuration(DEV_PLL, CFG_NOCM) |
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| 21 | config_complete() |
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| 22 | } |
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| 23 | |
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| 24 | if(cm_mmcx_mounted) { |
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| 25 | sw = read_cm_mmcx_sip_sw() //Read SIP switch |
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| 26 | |
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| 27 | if(sw == off_off) { |
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| 28 | //Up-Up switches -> ignore clock module |
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| 29 | load_configuration(DEV_RF_REF, CFG_NOCM) |
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| 30 | load_configuration(DEV_SAMP, CFG_NOCM) |
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| 31 | load_configuration(DEV_PLL, CFG_NOCM) |
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| 32 | } else if(sw == off_on) { |
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| 33 | //Up-Down switches -> Config A |
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| 34 | load_configuration(DEV_RF_REF, CFG_CMMMCX_A) |
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| 35 | load_configuration(DEV_SAMP, CFG_CMMMCX_A) |
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| 36 | } else if(sw == on_off) { |
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| 37 | //Down-Up switches -> Config B |
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| 38 | load_configuration(DEV_RF_REF, CFG_CMMMCX_B) |
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| 39 | load_configuration(DEV_SAMP, CFG_CMMMCX_B) |
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| 40 | } else if(sw == on_on) { |
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| 41 | //Down-Up switches -> Config C |
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| 42 | load_configuration(DEV_RF_REF, CFG_CMMMCX_C) |
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| 43 | load_configuration(DEV_SAMP, CFG_CMMMCX_C) |
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| 44 | } |
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| 45 | |
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| 46 | config_complete() |
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| 47 | } |
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| 48 | |
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| 49 | if(cm_pll_mounted) { |
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| 50 | sw = read_cm_pll_dip_sw() //Read 2 LSB of DIP switch |
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| 51 | |
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| 52 | if(sw == off_off) { |
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| 53 | //Down-Down switches -> ignore clock module |
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| 54 | load_configuration(DEV_RF_REF, CFG_NOCM) |
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| 55 | load_configuration(DEV_SAMP, CFG_NOCM) |
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| 56 | load_configuration(DEV_PLL, CFG_NOCM) |
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| 57 | config_complete() |
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| 58 | } |
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| 59 | |
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| 60 | wait_for_pll_refclk() |
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| 61 | |
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| 62 | if(sw == off_on) { |
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| 63 | //Down-Up switches -> Config A |
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| 64 | load_configuration(DEV_RF_REF, CFG_CMPLL_A) |
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| 65 | load_configuration(DEV_SAMP, CFG_CMPLL_A) |
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| 66 | load_configuration(DEV_PLL, CFG_CMPLL_A) |
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| 67 | } else if(sw == on_off) { |
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| 68 | //Up-Down switches -> Config B |
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| 69 | load_configuration(DEV_RF_REF, CFG_CMPLL_B) |
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| 70 | load_configuration(DEV_SAMP, CFG_CMPLL_B) |
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| 71 | load_configuration(DEV_PLL, CFG_CMPLL_B) |
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| 72 | } else if(sw == on_on) { |
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| 73 | //Up-Up switches -> Config C |
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| 74 | load_configuration(DEV_RF_REF, CFG_CMPLL_C) |
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| 75 | load_configuration(DEV_SAMP, CFG_CMPLL_C) |
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| 76 | load_configuration(DEV_PLL, CFG_CMPLL_C) |
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| 77 | } |
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| 78 | |
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| 79 | wait_for_pll_lock() |
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| 80 | |
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| 81 | config_complete() |
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| 82 | } |
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| 83 | } |
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| 84 | |
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| 85 | load_configuration(req_device, req_cfg) { |
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| 86 | if(eeprom[15000] == 0xA5 && eeprom[15001] == 0xCD) { |
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| 87 | cfg_data = copy_cfg_from_eeprom(req_device, req_cfg) |
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| 88 | } else { |
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| 89 | cfg_data = copy_cfg_from_rom(req_device, req_cfg) |
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| 90 | } |
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| 91 | |
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| 92 | write_cfg_to_device(req_device, cfg_data) |
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| 93 | } |
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| 94 | |
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| 95 | wait_for_pll_refclk() { |
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| 96 | while(read_pll_refclk_status != TOGGLING) {} |
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| 97 | } |
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| 98 | |
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| 99 | wait_for_pll_lock() { |
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| 100 | while(read_pll_lock_status != LOCKED) {} |
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| 101 | } |
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| 102 | |
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| 103 | config_complete() { |
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| 104 | clear_mmcm_reset() //Starts clocks to FPGA, allows MicroBlaze subsystem to boot |
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| 105 | halt() |
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| 106 | } |
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