| 1 | /***************************************************************** |
|---|
| 2 | * File: w3_iic_eeprom.h |
|---|
| 3 | * Copyright (c) 2012 Mango Communications, all rights reseved |
|---|
| 4 | * Released under the WARP License |
|---|
| 5 | * See http://warp.rice.edu/license for details |
|---|
| 6 | *****************************************************************/ |
|---|
| 7 | |
|---|
| 8 | /// @cond EXCLUDE_FROM_DOCS |
|---|
| 9 | // User code never uses the #define's from this header, so exclude them from the API docs |
|---|
| 10 | |
|---|
| 11 | #ifndef W3_IIC_EEPROM_H |
|---|
| 12 | #define W3_IIC_EEPROM_H |
|---|
| 13 | |
|---|
| 14 | #include "xil_io.h" |
|---|
| 15 | |
|---|
| 16 | /*************************** Constant Definitions ****************************/ |
|---|
| 17 | |
|---|
| 18 | // -------------------------------------------------------- |
|---|
| 19 | // Address offset for each slave register; exclude from docs, as users never use these directly |
|---|
| 20 | // |
|---|
| 21 | #define W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET (0x00000000) |
|---|
| 22 | #define W3_IIC_EEPROM_SLV_REG_00_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000000) |
|---|
| 23 | #define W3_IIC_EEPROM_SLV_REG_01_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000004) |
|---|
| 24 | #define W3_IIC_EEPROM_SLV_REG_02_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000008) |
|---|
| 25 | #define W3_IIC_EEPROM_SLV_REG_03_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x0000000C) |
|---|
| 26 | #define W3_IIC_EEPROM_SLV_REG_04_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000010) |
|---|
| 27 | #define W3_IIC_EEPROM_SLV_REG_05_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000014) |
|---|
| 28 | #define W3_IIC_EEPROM_SLV_REG_06_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000018) |
|---|
| 29 | #define W3_IIC_EEPROM_SLV_REG_07_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x0000001C) |
|---|
| 30 | #define W3_IIC_EEPROM_SLV_REG_08_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000020) |
|---|
| 31 | #define W3_IIC_EEPROM_SLV_REG_09_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000024) |
|---|
| 32 | #define W3_IIC_EEPROM_SLV_REG_10_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000028) |
|---|
| 33 | #define W3_IIC_EEPROM_SLV_REG_11_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x0000002C) |
|---|
| 34 | #define W3_IIC_EEPROM_SLV_REG_12_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000030) |
|---|
| 35 | #define W3_IIC_EEPROM_SLV_REG_13_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000034) |
|---|
| 36 | #define W3_IIC_EEPROM_SLV_REG_14_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x00000038) |
|---|
| 37 | #define W3_IIC_EEPROM_SLV_REG_15_OFFSET (W3_IIC_EEPROM_USER_SLV_SPACE_OFFSET + 0x0000003C) |
|---|
| 38 | |
|---|
| 39 | // -------------------------------------------------------- |
|---|
| 40 | // Register common names |
|---|
| 41 | // |
|---|
| 42 | #define IIC_EEPROM_REG_CONFIG_STATUS W3_IIC_EEPROM_SLV_REG_00_OFFSET |
|---|
| 43 | #define IIC_EEPROM_REG_CMD W3_IIC_EEPROM_SLV_REG_01_OFFSET |
|---|
| 44 | #define IIC_EEPROM_REG_TX W3_IIC_EEPROM_SLV_REG_02_OFFSET |
|---|
| 45 | #define IIC_EEPROM_REG_RX W3_IIC_EEPROM_SLV_REG_03_OFFSET |
|---|
| 46 | #define IIC_EEPROM_REG_MUTEX W3_IIC_EEPROM_SLV_REG_04_OFFSET |
|---|
| 47 | #define IIC_EEPROM_REG_SERIAL_NUM W3_IIC_EEPROM_SLV_REG_05_OFFSET |
|---|
| 48 | #define IIC_EEPROM_REG_ETH_A_MAC_ADDR_0 W3_IIC_EEPROM_SLV_REG_06_OFFSET |
|---|
| 49 | #define IIC_EEPROM_REG_ETH_A_MAC_ADDR_1 W3_IIC_EEPROM_SLV_REG_07_OFFSET |
|---|
| 50 | #define IIC_EEPROM_REG_ETH_B_MAC_ADDR_0 W3_IIC_EEPROM_SLV_REG_08_OFFSET |
|---|
| 51 | #define IIC_EEPROM_REG_ETH_B_MAC_ADDR_1 W3_IIC_EEPROM_SLV_REG_09_OFFSET |
|---|
| 52 | #define IIC_EEPROM_REG_FPGA_DNA_0 W3_IIC_EEPROM_SLV_REG_10_OFFSET |
|---|
| 53 | #define IIC_EEPROM_REG_FPGA_DNA_1 W3_IIC_EEPROM_SLV_REG_11_OFFSET |
|---|
| 54 | |
|---|
| 55 | // -------------------------------------------------------- |
|---|
| 56 | // Masks for config/status register |
|---|
| 57 | // |
|---|
| 58 | #define IIC_EEPROM_REGMASK_CLKDIV 0x000000FF |
|---|
| 59 | #define IIC_EEPROM_REGMASK_CORE_EN 0x00000100 |
|---|
| 60 | #define IIC_EEPROM_REGMASK_RXACK 0x00010000 |
|---|
| 61 | #define IIC_EEPROM_REGMASK_BUSY 0x00020000 |
|---|
| 62 | #define IIC_EEPROM_REGMASK_AL 0x00040000 |
|---|
| 63 | #define IIC_EEPROM_REGMASK_TIP 0x00080000 |
|---|
| 64 | #define IIC_EEPROM_REGMASK_INIT 0x80000000 |
|---|
| 65 | |
|---|
| 66 | // -------------------------------------------------------- |
|---|
| 67 | // Masks for command register |
|---|
| 68 | // |
|---|
| 69 | #define IIC_EEPROM_REGMASK_START 0x00000001 |
|---|
| 70 | #define IIC_EEPROM_REGMASK_STOP 0x00000002 |
|---|
| 71 | #define IIC_EEPROM_REGMASK_READ 0x00000004 |
|---|
| 72 | #define IIC_EEPROM_REGMASK_WRITE 0x00000008 |
|---|
| 73 | #define IIC_EEPROM_REGMASK_ACK 0x00000010 |
|---|
| 74 | |
|---|
| 75 | // -------------------------------------------------------- |
|---|
| 76 | // Masks for mutex register |
|---|
| 77 | // |
|---|
| 78 | #define IIC_EEPROM_REGMASK_LOCK 0x80000000 |
|---|
| 79 | |
|---|
| 80 | #define IIC_EEPROM_READY 0 |
|---|
| 81 | #define IIC_EEPROM_LOCKED 1 |
|---|
| 82 | |
|---|
| 83 | // -------------------------------------------------------- |
|---|
| 84 | // Control Words |
|---|
| 85 | // |
|---|
| 86 | #define IIC_EEPROM_CONTROL_WORD_RD 0xA1 |
|---|
| 87 | #define IIC_EEPROM_CONTROL_WORD_WR 0xA0 |
|---|
| 88 | |
|---|
| 89 | |
|---|
| 90 | // -------------------------------------------------------- |
|---|
| 91 | // Misc |
|---|
| 92 | // |
|---|
| 93 | #define IIC_EEPROM_SUCCESS 0 |
|---|
| 94 | #define IIC_EEPROM_FAILURE -1 |
|---|
| 95 | |
|---|
| 96 | |
|---|
| 97 | // -------------------------------------------------------- |
|---|
| 98 | // Macros (for backward compatibility) |
|---|
| 99 | // |
|---|
| 100 | #define iic_eeprom_readByte(ba, addr) iic_eeprom_read_byte(ba, addr, XPAR_CPU_ID) |
|---|
| 101 | #define iic_eeprom_writeByte(ba, addr, val) iic_eeprom_write_byte(ba, addr, val, XPAR_CPU_ID) |
|---|
| 102 | #define w3_eeprom_readSerialNum(ba) w3_eeprom_read_serial_num(ba) |
|---|
| 103 | #define w3_eeprom_readEthAddr(ba, sel, buf) w3_eeprom_read_eth_addr(ba, sel, buf) |
|---|
| 104 | |
|---|
| 105 | |
|---|
| 106 | |
|---|
| 107 | /*************************** Function Prototypes *****************************/ |
|---|
| 108 | |
|---|
| 109 | // EEPROM functions |
|---|
| 110 | int iic_eeprom_init(u32 ba, u8 clk_div, u32 id); |
|---|
| 111 | |
|---|
| 112 | int iic_eeprom_trylock(u32 ba, u32 id); |
|---|
| 113 | void iic_eeprom_unlock(u32 ba); |
|---|
| 114 | |
|---|
| 115 | int iic_eeprom_write_byte(u32 ba, u16 addr_to_write, u8 byte_to_write, u32 id); |
|---|
| 116 | int iic_eeprom_read_byte(u32 ba, u16 addr_to_read, u32 id); |
|---|
| 117 | |
|---|
| 118 | // Data access functions |
|---|
| 119 | u32 w3_eeprom_read_serial_num(u32 ba); |
|---|
| 120 | u32 w3_eeprom_read_fpga_dna(u32 ba, int lo_hi); |
|---|
| 121 | void w3_eeprom_read_eth_addr(u32 ba, u8 addr_sel, u8* addr_buf); |
|---|
| 122 | |
|---|
| 123 | #endif /** W3_IIC_EEPROM_H */ |
|---|
| 124 | /// @endcond |
|---|
