1 | #### Additional TriMode_MAC_GMII constraints |
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2 | |
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3 | NET "*tx_gmii_mii_clk_in_0*" TNM_NET = "clk_phy_tx_clk0"; |
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4 | NET "*tx_gmii_mii_clk_out_0*" TNM_NET = "clk_phy_tx_clk0"; |
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5 | TIMESPEC "TS_phy_tx_clk0" = PERIOD "clk_phy_tx_clk0" 7700 ps HIGH 50 %; |
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6 | |
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7 | NET "*gmii_rx_clk_0*" TNM_NET = "clk_phy_rx_clk0"; |
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8 | NET "*gmii_rx_clk_delay_0*" TNM_NET = "clk_phy_rx_clk0"; |
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9 | NET "*gmii_rx_clk_ibufg_0*" TNM_NET = "clk_phy_rx_clk0"; |
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10 | TIMESPEC "TS_phy_rx_clk0" = PERIOD "clk_phy_rx_clk0" 7700 ps HIGH 50 %; |
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11 | |
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12 | NET "*tx_client_clk_in_0*" TNM_NET = "clk_client_tx_clk0"; |
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13 | NET "*tx_client_clk_out_0*" TNM_NET = "clk_client_tx_clk0"; |
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14 | TIMESPEC "TS_client_tx_clk0" = PERIOD "clk_client_tx_clk0" 7700 ps HIGH 50 %; |
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15 | |
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16 | NET "*rx_client_clk_in_0*" TNM_NET = "clk_client_rx_clk0"; |
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17 | NET "*rx_client_clk_out_0*" TNM_NET = "clk_client_rx_clk0"; |
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18 | TIMESPEC "TS_client_rx_clk0" = PERIOD "clk_client_rx_clk0" 7700 ps HIGH 50 %; |
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19 | |
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20 | NET "*mii_tx_clk_0*" TNM_NET = "clk_mii_tx_clk0"; |
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21 | TIMESPEC "TS_mii_tx_clk0" = PERIOD "clk_mii_tx_clk0" 25000 ps HIGH 50 %; |
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22 | |
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23 | |
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24 | #################### EMAC 0 GMII Constraints ######################## |
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25 | INST "*mii0?RXD_TO_MAC*" IOB = true; |
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26 | INST "*mii0?RX_DV_TO_MAC" IOB = true; |
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27 | INST "*mii0?RX_ER_TO_MAC" IOB = true; |
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28 | |
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29 | INST "*gmii0/*gmii_rxd?_delay" IOBDELAY_TYPE = FIXED; |
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30 | INST "*gmii0/*gmii_rx_dv_delay" IOBDELAY_TYPE = FIXED; |
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31 | INST "*gmii0/*gmii_rx_er_delay" IOBDELAY_TYPE = FIXED; |
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32 | INST "*gmii0/*gmii_rxd?_delay" IOBDELAY_VALUE = 0; |
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33 | INST "*gmii0/*gmii_rx_dv_delay" IOBDELAY_VALUE = 0; |
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34 | INST "*gmii0/*gmii_rx_er_delay" IOBDELAY_VALUE = 0; |
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35 | INST "*gmii_rx_clk_0_delay" IOBDELAY_TYPE = FIXED; |
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36 | INST "*gmii_rx_clk_0_delay" IOBDELAY_VALUE = 30; |
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37 | |
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38 | INST "fpga_0_TriMode_MAC_GMII_GMII_TXD_0_pin<?>" TNM = "sig_mii_tx_0"; |
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39 | INST "fpga_0_TriMode_MAC_GMII_GMII_TX_EN_0_pin" TNM = "sig_mii_tx_0"; |
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40 | INST "fpga_0_TriMode_MAC_GMII_GMII_TX_ER_0_pin" TNM = "sig_mii_tx_0"; |
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41 | |
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42 | INST "fpga_0_TriMode_MAC_GMII_GMII_RXD_0_pin<?>" TNM = "sig_mii_rx_0"; |
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43 | INST "fpga_0_TriMode_MAC_GMII_GMII_RX_DV_0_pin" TNM = "sig_mii_rx_0"; |
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44 | INST "fpga_0_TriMode_MAC_GMII_GMII_RX_ER_0_pin" TNM = "sig_mii_rx_0"; |
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45 | |
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46 | # Need to TIG between the LocalLink clock and the rx_client and tx_client clocks |
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47 | NET "*/LlinkTemac0_CLK*" TNM_NET = "LLCLK"; |
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48 | TIMESPEC "TS_LL_CLK_2_RX_CLIENT_CLK" = FROM LLCLK TO clk_client_rx_clk0 8000 ps DATAPATHONLY; |
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49 | TIMESPEC "TS_LL_CLK_2_TX_CLIENT_CLK" = FROM LLCLK TO clk_client_tx_clk0 8000 ps DATAPATHONLY; |
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50 | TIMESPEC "TS_RX_CLIENT_CLK_2_LL_CLK" = FROM clk_client_rx_clk0 TO LLCLK 10000 ps DATAPATHONLY; |
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51 | TIMESPEC "TS_TX_CLIENT_CLK_2_LL_CLK" = FROM clk_client_tx_clk0 TO LLCLK 10000 ps DATAPATHONLY; |
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52 | |
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