Changes between Version 8 and Version 9 of FAQ/Hardware


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Timestamp:
Jan 27, 2007, 8:51:16 PM (17 years ago)
Author:
murphpo
Comment:

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  • FAQ/Hardware

    v8 v9  
    3333In some cases, it is necessary to bypass the WARP FPGA board's built-in USB configuration circuit. You will need an external Xilinx programming cable to do this.
    3434
    35  1. Locate the 14-pin programming header on the back of the FPGA board that is labaled 'CPLD'. Of the two programming headers, this one is nearer the center of the board.
     35 1. Locate the 14-pin programming header (component J51) on the back of the FPGA board that is labaled 'CPLD'. Of the two programming headers, this one is nearer the center of the board.
    3636 1. Connect the programming cable's JTAG header to the header.
    3737 1. Run Xilinx iMPACT (Start->Programs->Xilinx ISE->Accessories->iMPACT)