| 8 | == LCD Screen Pinout == |
| 9 | |
| 10 | The LCD module has a simple 4-pin SPI interface for control and data. Each pin is tied to dedicated FPGA I/O via the daughtercard headers. |
| 11 | |
| 12 | The pinout information is listed below. The FPGA pins listed here correspond to WARP FPGA Board v1.2. |
| 13 | |
| 14 | '''LEDs - Pinout''' |
| 15 | || '''Signal''' || '''Header Pin''' || '''Slot 1 Pin''' || '''Slot 2 Pin''' || '''Slot 3 Pin''' || ''' Slot 4 Pin''' || |
| 16 | || RESET || 82 || V5 || AG10 || AH38 || K36 || |
| 17 | || CS || 85 || V8 || AH7 || AH37 || K37 || |
| 18 | || SCLK || 84 || V3 || AR6 || AG34 || L34 || |
| 19 | || SDATA || 83 || W4 || AM8 || AG38 || L33 || |
| 20 | |
| 21 | |