WARPLab 7.5.x FPGA Architecture for WARP v3 Hardware

The WARPLab 7.5.x design for WARP v3 makes changes to the underlying FPGA architecture in order to increase the buffer sizes for Read / Write IQ. This includes:

• Updates to the WARPLab Buffers core to allow for larger Read / Write IQ indexing
• Updates to the WARPLab Buffers core to allow DMA access to RSSI buffers
• Updates to the Trigger Manager core to allow for Ethernet triggers on Eth B
• Updates to the AGC core (slight modification of the 802.11 AGC core)
• Updates to Ethernet B so that it has the same capabilities as Ethernet A
• Updates to the AXI Interconnect to address all 2GB of DDR

Interconnect Architecture

Address Map

Please review the XPS project for the latest information.

Microblaze Address Map

NOTE: All Address not explicitly defined are reserved.

IP Instance	Base Address	High Address	Size
DLMB	0x0000_0000	0x0001_FFFF	128K
ILMB	0x0000_0000	0x0001_FFFF	128K
Interrupt Controller	0x1000_0000	0x1000_FFFF	64K
WARPLab Trigger Proc	0x1010_0000	0x1010_FFFF	64K
WARPLab AGC	0x1020_0000	0x1020_FFFF	64K
WARPLab Buffers	0x1030_0000	0x1030_FFFF	64K
ETH A MAC	0x1100_0000	0x1103_FFFF	256K
ETH B MAC	0x1110_0000	0x1113_FFFF	256K
AXI DMA (ETH A)	0x1120_0000	0x1120_FFFF	64K
AXI DMA (ETH B)	0x1130_0000	0x1130_FFFF	64K
CDMA	0x1200_0000	0x1200_FFFF	64K
W3 Clock Controller	0x2010_0000	0x2010_FFFF	64K
W3 User IO	0x2020_0000	0x2020_FFFF	64K
Radio Controller	0x2030_0000	0x2030_FFFF	64K
W3 AD Controller	0x2040_0000	0x2040_FFFF	64K
AXI GPIO	0x2050_0000	0x2050_FFFF	64K
AXI SYSMON ADC	0x2060_0000	0x2060_FFFF	64K
AXI Timer	0x2070_0000	0x2070_FFFF	64K
USB UART	0x2080_0000	0x2080_FFFF	64K
W3 I2C EEPROM On Board	0x2090_0000	0x2090_FFFF	64K
W3 I2C EEPROM FMC	0x20A0_0000	0x20A0_FFFF	64K
RFA RX CTL	0x4100_0000	0x4101_FFFF	128K
RFA RSSI CTL	0x4102_0000	0x4102_3FFF	16K
RFA TX CTL	0x4104_0000	0x4105_FFFF	128K
RFB RX CTL	0x4108_0000	0x4109_FFFF	128K
RFB RSSI CTL	0x410A_0000	0x410A_3FFF	16K
RFB TX CTL	0x410C_0000	0x410D_FFFF	128K
RFC RX CTL	0x4110_0000	0x4111_FFFF	128K
RFC RSSI CTL	0x4112_0000	0x4112_3FFF	16K
RFC TX CTL	0x4114_0000	0x4115_FFFF	128K
RFD RX CTL	0x4118_0000	0x4119_FFFF	128K
RFD RSSI CTL	0x411A_0000	0x411A_3FFF	16K
RFD TX CTL	0x411C_0000	0x411D_FFFF	128K
BRAM	0x5000_0000	0x5001_FFFF	128K
DDR	0x8000_0000	0xFFFF_FFFF	2G