| | 1 | [[TracNav(WARPLab/TOC)]] |
| | 2 | |
| | 3 | = WARPLab Reference Design Hardware Config: WARP v2 = |
| | 4 | |
| | 5 | [[Image(WARP_v2_labelled.png)]] |
| | 6 | |
| | 7 | |
| | 8 | === Radio Interface === |
| | 9 | |
| | 10 | * In the 2 RF Node configuration (ie only RF A and RF B are populated), you should only use the '''2RF bitstream''' in the [wiki:WARPLab/Downloads download]. |
| | 11 | * In the 4 RF Node configuration (ie all RF interfaces are populated), you should only use the '''4RF bitstream''' in the [wiki:WARPLab/Downloads download]. |
| | 12 | |
| | 13 | === Debug Header === |
| | 14 | |
| | 15 | The [wiki:HardwareUsersGuides/FPGABoard_v2.2/OtherIO#DigitalIO debug header] is configured by default to map to the following pins: |
| | 16 | |
| | 17 | [[Image(Debug_Header_Diagram_BnW.png)]] |
| | 18 | |
| | 19 | |
| | 20 | === Clock Configuration === |
| | 21 | |
| | 22 | * Detailed information on the WARP v2 Clocking configuration can be found [wiki:HardwareUsersGuides/FPGABoard_v2.2/Clocking here]. |
| | 23 | * To adjust the [wiki:HardwareUsersGuides/ClockBoard_v1.1] |
| | 24 | |
| | 25 | |
| | 26 | === Ethernet === |
| | 27 | |
| | 28 | * Only one Ethernet connection (Eth A) on the board |
