Changes between Version 17 and Version 18 of WARPLab6/Releases


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Timestamp:
Dec 10, 2009, 12:34:46 PM (14 years ago)
Author:
sgupta
Comment:

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  • WARPLab6/Releases

    v17 v18  
    77WARPLab '''Version 5.1''' is the latest WARPLab release and includes support for the [wiki:HardwareUsersGuides/FPGABoard_v2.2 Virtex-4 FPGA Board].
    88
     9 * '''Notes for v5.2'''
     10  * Posted December 2009
     11  * Can now store RSSI data even in the 4x4 design
     12  * Consolidated the Sysgen models. Now there is one Sysgen model, {{{warplab_mimo_4x4.mdl}}}, that implements the full system: 4 radios with I/Q and RSSI buffers. The 2x2 reference design does not connect the paths for radios in slot 1 and slot 4 but is otherwise identical to the 4x4 design.
    913 * '''Notes for v5.1'''
    10   * Posted November 2009.
     14  * Posted November 2009
    1115  * Builds upon the features of Version 5
    1216  * Support for both Version 1 and 2 of the FPGA Board
    … …  
    2226
    2327 * M-code:
    24   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_1/M_Code_Reference Reference M-Code Version 5.1].
    25   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_1/M_Code_Examples M-Code examples] that work with version 5.1 of the Reference M code.
     28  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_2/M_Code_Reference Reference M-Code Version 5.2].
     29  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_2/M_Code_Examples M-Code examples] that work with version 5.2 of the Reference M code.
    2630 * Bitstreams:
    27   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_1/Bitstreams/WARPLab_2x2_v05_01_FPGAv1.bit 2x2 MIMO bitstream for FPGA Version 1].
    28   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_1/Bitstreams/WARPLab_4x4_v05_01_FPGAv1.bit 4x4 MIMO bitstream for FPGA Version 1].
    29   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_1/Bitstreams/WARPLab_2x2_v05_01_FPGAv2.bit 2x2 MIMO bitstream for FPGA Version 2].
    30   * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_1/Bitstreams/WARPLab_4x4_v05_01_FPGAv2.bit 4x4 MIMO bitstream for FPGA Version 2].
     31  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_2/Bitstreams/WARPLab_2x2_v05_02_FPGAv1.bit 2x2 MIMO bitstream for FPGA Version 1].
     32  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_2/Bitstreams/WARPLab_4x4_v05_02_FPGAv1.bit 4x4 MIMO bitstream for FPGA Version 1].
     33  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_2/Bitstreams/WARPLab_2x2_v05_02_FPGAv2.bit 2x2 MIMO bitstream for FPGA Version 2].
     34  * [source:/ResearchApps/PHY/WARPLAB/WARPLab_v05_2/Bitstreams/WARPLab_4x4_v05_02_FPGAv2.bit 4x4 MIMO bitstream for FPGA Version 2].
    3135 * Reference Design:
    32   * The XPS Reference Designs used to generate the 2x2 and 4x4 MIMO bitstreams that work with Version 5.1 of the Reference M-Code are available [wiki:WARPLab/RefDesign here].
     36  * The XPS Reference Designs used to generate the 2x2 and 4x4 MIMO bitstreams that work with Version 5.2 of the Reference M-Code are available [wiki:WARPLab/RefDesign here].
    3337 
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