WARP Project Forums - Wireless Open-Access Research Platform

severinwu · 2015-Oct-18 23:41:04

Hi, I'm trying to build a new OFDM_reference design for my own Spec

and I changed the parameter of the fdm_txrx_supermimo_coded model and clicking the "generate" button trying to generate the pcore

it tooks maybe 5 ~ 6 hours and the message box still stucks there

I have searched about this issue and from this topic http://warpproject.org/forums/viewtopic.php?id=2126

and know that maybe I need to wait for more times until it generated

but I found this message show up in the MATLAB command window :

I think maybe I got another problem to solve in pcore generation

Can you give me some opinion to rectify this issue?

P.S I noticed that there is one more message pop out when I just right click the "generate" button

Last edited by severinwu (2015-Oct-19 22:53:21)

welsh · 2015-Oct-19 09:00:09

Unfortunately, we do not host images on our site, so we cannot see the images you tried to show us. Please use another site, like dropbox or any hosting site you prefer, to host the images.

While I don't see the messages that Matlab was giving you, one thing I would suggest is before you generate the pcore, you update the diagram (i.e. "Edit" --> "Update Diagram"). This will have System Generator go through and make sure that there are not any errors in the design. If the diagram update is clean, then you are more likely that the generation of the pcore will be clean.

murphpo · 2015-Oct-19 10:08:21

That last error (Undefined variable simOnly_simLength) indicates the init script did not run before you started the compilation process. Simulink runs the init script (ofdm_rx_supermimo_init.m) when you run the simulation, or when you click the "Update Model" button. I suggest the following:
-Close and re-open MATLAB
-Change directory to WARP/ResearchApps/PHY/MIMO_OFDM (or whever your have the .mdl and .m files)
-Open ofdm_txrx_supermimo_coded.mdl
-Click the Update Model button (or hit Ctrl-D)

Simulink will load the init scripts and update the model display with port data types. Look at the MATLAB command line for any errors. The Update Model process must complete without error before the simulation can run and before the pcore can be generated.

The System Generator compilation process will run for a long time the first time. It will be much faster on subsequent builds thanks to a cache of core netlists maintained by the tools. Use the Task Manager to monitor the compilation process. You should see CPU usage by java/MATLAB/xst during the compilation.

severinwu · 2015-Oct-20 02:03:28

Sorry about the images didn't show up, now I edit the website of those images

I'll try this suggestions and if there are more information to solve this issue after the images show up, pls let me know

thanks for ur replies

severinwu · 2015-Oct-21 20:57:54

Well, the original issue is fixed. But the generation stopped because of errors

here is the errors showed on the window

and the error code in "coregen.log'' shows below :

Code:

 INFO:sim:948 - Finished FLIST file generation.
Moving files to output directory...
Finished moving files to output directory
Saved CGP file for project 'coregen'.
INFO:sim:172 - Generating IP...
Resolving generics for 'dds_cmplr_v4_0_1ebc489537f66ad6'...
Applying external generics to 'dds_cmplr_v4_0_1ebc489537f66ad6'...
Delivering associated files for 'dds_cmplr_v4_0_1ebc489537f66ad6'...
Generating implementation netlist for 'dds_cmplr_v4_0_1ebc489537f66ad6'...
INFO:sim - Pre-processing HDL files for 'dds_cmplr_v4_0_1ebc489537f66ad6'...
Running synthesis for 'dds_cmplr_v4_0_1ebc489537f66ad6'
ERROR:sim -
   "C:/Users/user/AppData/Local/Temp/sysgentmp-user/cg_wk/c88875c340f787f8c/tmp/
   ./_cg/_dbg/./dds_compiler_v4_0/sin_cos.vhd" line 228: Real operand is not
   supported in this context.
ERROR:sim - Failed executing Tcl generator.
ERROR:sim - Failed to generate 'dds_cmplr_v4_0_1ebc489537f66ad6'.  Failed
   executing Tcl generator.

ERROR:sim:877 - Error found during execution of IP 'DDS Compiler v4.0'

At first I guess maybe it is cause by the memory lack of my computer, but the widows system and the matlab is all 64bits

and the memory is up to 8GB, so it might not cause by the memory lack

maybe the point is about this sectence :

Code:

ERROR:sim -    "C:/Users/user/AppData/Local/Temp/sysgentmp-user/cg_wk/c88875c340f787f8c/tmp/
   ./_cg/_dbg/./dds_compiler_v4_0/sin_cos.vhd" line 228: Real operand is not  supported in this context."

what can I do to fix this error?

Additionally question, will the ISE version lead to the error?

currently ISE verson in my computer is 14.5, and I noticed that the reference design was build in ISE 13.4.

Last edited by severinwu (2015-Oct-22 01:33:35)

murphpo · 2015-Oct-23 08:00:13

We've never seen that error, but another user has when using the 14.5 tools. We recommend using either 14.4 (the version we use for the 802.11 and WARPLab reference designs) or 13.4 (the version we used to build the latest OFDM ref design). Upgrading from 13.4 to 14.4 usually works fine. Version 14.5 has issues.

WARP Project Forums - Wireless Open-Access Research Platform

#1 2015-Oct-18 23:41:04

pcore generation of ofdm_txrx_supermimo_coded model

#2 2015-Oct-19 09:00:09

Re: pcore generation of ofdm_txrx_supermimo_coded model

#3 2015-Oct-19 10:08:21

Re: pcore generation of ofdm_txrx_supermimo_coded model

#4 2015-Oct-20 02:03:28

Re: pcore generation of ofdm_txrx_supermimo_coded model

#5 2015-Oct-21 20:57:54

Re: pcore generation of ofdm_txrx_supermimo_coded model

Code:

Code:

#6 2015-Oct-23 08:00:13

Re: pcore generation of ofdm_txrx_supermimo_coded model

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