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Dear WARP Support,
We are thinking to implement distributed clock (e.g., buying PTP 1588 IP core for Virtex-6) on the WARP v3 hardware. Would this be possible and if yes would be able to advise on the difficulty or potential problem for it?
Thanks.
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Sorry I should make it clear above that I would send the clock information via Ethernet ports. Thanks.
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What clock information are you trying to send?
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The WARP v3 hardware uses a Marvell 88e1121R PHY, which does not implement the PHY-specific behaviors of IEEE 1588. I believe the PHY will pass through any IEEE 1588 frames (these are just IP/UDP, right?). This may still be useful for synchronization tasks in the FPGA.
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