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#26 2018-Oct-04 09:08:39

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

Yes, you can edit the Tx PHY core using Xilinx System Generator / Simulink.

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#27 2018-Oct-07 10:36:06

Bobbili Vinitha
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Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

i didn't use system generator till now. Is editing  the wlan_phy_tx_pmd(TX PHY core) for adding new block is a complex task? what is the best way to learn it?

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#28 2018-Oct-08 12:42:40

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

Is editing  the wlan_phy_tx_pmd(TX PHY core) for adding new block is a complex task? what is the best way to learn it?

Yes, any FPGA design is a complex task. Our tutorials provide a basic introduction to System Generator. The Xilinx documentation and training materials are a more comprehensive resource.

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#29 2018-Oct-10 06:36:06

Bobbili Vinitha
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Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

we have designed a 16QAM modulator in verilog HDL. now we are trying to make one warpv3 node as qam modulator. after giving bitstream input to  modulator it will generate modulated output. After configuring warp board with this modulator, will the board transmit the modulated output automatically or is there any other requirements or steps I need to follow to make the transmission through RFa of warp board.

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#30 2018-Oct-10 09:30:43

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

You will need to integrate your custom PHY transmitter with required support cores and a MicroBlaze CPU. The support cores and CPU are required to connect and configure the ADC/DAC/RF/clocking circuits on the WARP v3 hardware. Our Reference Designs (802.11, WARPLab) are good examples of designs which implement these interfaces.

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#31 2018-Nov-01 00:47:31

Bobbili Vinitha
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Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

Is it required to integrate Microblaze cpu to custom PHY transmitter? In my application after configuring fpga with QAM modulator the board needs to transmit modulated output for that i need to activate transmission path on board.  radio controller logic controls MAX2829 transceiver  power amplifier and RF switch. does QAM modulator along with radio controller hdl serve my application?

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#32 2018-Nov-01 07:56:42

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

Yes a MicroBlaze CPU will be required. The radio_controller, ad_controller and clock_controller cores (all required to use the WARP v3 RF interfaces) are slave peripherals that attach to an AXI bus. You need a CPU as a master on this bus to configure and control these peripheral cores.

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#33 2018-Nov-04 09:37:22

Bobbili Vinitha
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Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

Bobbili Vinitha wrote:

Is it required to integrate Microblaze cpu to custom PHY transmitter? In my application after configuring fpga with QAM modulator the board needs to transmit modulated output for that i need to activate transmission path on board.  radio controller logic controls MAX2829 transceiver  power amplifier and RF switch. does QAM modulator along with radio controller hdl serve my application?

For this application can i use simple microblaze cpu  present in xps project or do  i need  use cpu of 802.11n refernce design?

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#34 2018-Nov-05 09:36:04

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

The 802.11 Ref Design uses two MicroBlaze CPUs. The lower CPU manages the RF interfaces. The WARPLab Ref Design uses one MicroBlaze CPU. You will need to study your application's requirements, study these reference designs, study the Xilinx docs, then decided on the right architecture for your design.

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#35 2018-Nov-08 05:47:26

Bobbili Vinitha
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Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

Mac layer is responsible for moving data across channel. In 802.11 reference design mac is implemented using c code. If i do little modification in hardware design (like adding extra block before ifft block in transmitter) In such case do we need to change c code?

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#36 2018-Nov-08 09:03:42

chunter
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From: Mango Communications
Registered: 2006-Aug-24
Posts: 1192

Re: 802.11 reference design

That's not a question we can answer -- it depends on what your extra block does. At a minimum, you might want to write some C code that configures parameters to your block in a register.

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#37 2018-Nov-10 08:18:04

Bobbili Vinitha
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Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

Using 802.11n reference design i want to transmit data without any modulation from one warp board to other board. By Removing wlan_phy_tx, wlan_phy_rx  cores which  are responsible for modulation and demodulation of data can i able to achieve this? For giving input which part of code i need to change?

Last edited by Bobbili Vinitha (2018-Nov-10 08:19:28)

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#38 2018-Nov-10 12:13:41

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

Transmitting data without any modulation doesn't make sense. A PHY transceiver converts digital payloads into waveforms suitable for transmission via the wireless medium. Using the 802.11 Reference Design without the 802.11 PHY is pretty pointless.

If you want to experiment with custom modulation techniques, I would recommend the WARPLab Reference Design. WARPLab makes it easy to implement custom PHY algorithms in M code. This is *much* easier than implementing a custom PHY in the FPGA.

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#39 2018-Nov-11 12:21:23

Bobbili Vinitha
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Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

I need to implement a custom PHY int the FPGA. As i said earlier i need to insert precoder block before ifft block in ofdm tranmmiter(PHY_tx). To achieve this one way is editing wlan_phy_tx core other way is designing  ofdm trammiter with precoder and creating fpga core from that design and inserting that core in 802.11 reference design .please suggest me best way to do this.

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#40 2018-Nov-12 08:48:39

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

The designs you're describing (custom PHY core or heavily customizing an existing core) are very complex projects. You need expertise in PHY algorithms, FPGA design, and embedded software to achieve this. Our tutorials are a good resource for an introduction to the Xilinx tools (at a minimum you must learn System Generator and XPS). But we cannot teach you the rest on the forums; you must go learn this on your own.

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#41 2018-Nov-15 09:04:17

Bobbili Vinitha
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Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

what are the widths of modulator block output and ifft block input? from which part of the code we will get this information?

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#42 2018-Nov-15 09:20:04

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

These details are available by exploring the Tx PHY System Generator model. Enable display of Port Data Types to see the signedness/widths/binary-points of all signals in the design.

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#43 2018-Nov-16 12:03:02

Bobbili Vinitha
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Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

Is it possible to find channel matrix using warplab ref design or 802.11 ref design?

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#44 2018-Nov-16 13:48:25

chunter
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From: Mango Communications
Registered: 2006-Aug-24
Posts: 1192

Re: 802.11 reference design

1. The 802.11 Reference Design is currently SISO-only, so the channel "matrix" is a scalar-per-subcarrier. But yes, the values used by the Rx equalizer are reported with every reception into the Rx packet buffer. They are also logged and can be retrieved using wlan_exp. The Channel Estimate Viewer example goes even a step further and visualizes these channel estimates in MATLAB (though, critically, MATLAB is not a requirement to process log entries with channel estimates... it's just a convenient way to plot things)

2. The WARPLab Reference Design is just a way of transmitting and receiving waveforms across multiple nodes and antennas. There's no innate "channel matrix" to that design since it is user code that implements all PHY processing. If you are referring to one our PHY examples, then yes, the MIMO OFDM example transmits and receives a simple 2x2 MIMO OFDM waveform. If you study that code example you should be able to see where the channel estimates are extracted and used during equalization.

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#45 2018-Nov-23 08:30:30

Bobbili Vinitha
Member
Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

wlan_phy_tx_init.m  From this mcode file we can get information regarding Transmitter address,Destination address and we can clearly see our payload(00-01-02...0f) .How to get the payload information in c or python codes of 802.11 reference design?

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#46 2018-Nov-23 09:00:08

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

The C code populates addresses as needed - the TA is the node's own address, the RA is the intended receiver of a given packet. Payloads are copied from Ethernet packets (via Ethernet encapsulation) or according to the spec (for management packets).

Please review the 802.11 ref design user guide for details on how to use the wlan_exp Python tools.

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#47 2018-Dec-05 10:16:11

Bobbili Vinitha
Member
Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

I have to do simple transmission using warp board .i need to transfer digital data like 10110 from board.How to transmit this data using LTG?

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#48 2018-Dec-05 11:32:30

murphpo
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From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

You would need to modify the C code (probably the 'ltg_event()' function) to define a custom payload.

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#49 2018-Dec-09 01:16:24

Bobbili Vinitha
Member
Registered: 2018-Jun-26
Posts: 30

Re: 802.11 reference design

i have designed a system using verilog. when i give some digital input after processing it will produce digital output.If i configure this system on FPGA of warp board Is it possible to observe this output using UART of warp board alone without using any reference design .(i.e without using cpu's and peripheral cores only using UART is it possible to observe the output)?

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#50 2018-Dec-09 11:03:52

murphpo
Administrator
From: Mango Communications
Registered: 2006-Jul-03
Posts: 5005

Re: 802.11 reference design

The WARP v3 board uses an FTDI FT230X USB-UART transceiver. If you want to interface to this transceiver from a custom design, you must implement suitable interface logic. We use the Xilinx axi_uartlite core in our reference designs for the UART interface. This core requires an AXI interconnect and assumes a CPU (MicroBlaze in our designs) for configuration/control.

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