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#1 2015-Jul-06 04:13:06

arinz
Member
Registered: 2015-Jul-06
Posts: 7

System Generator Error: "Index exceeds matrix dimensions"

Hello,

I want to modify the warplab_buffer system generator block you provided on your website. The problem is, although I had not change anything, when I tried to generate the HDL code by clicking a generate button under the "System Generator" block,  I got an error saying: "Index exceeds matrix dimensions". I tried this for other provided system generator blocks and hdl code is generated successfully. Do you know the cause of this error?

Thanks.

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#2 2015-Jul-06 09:10:22

welsh
Administrator
From: Mango Communications
Registered: 2013-May-15
Posts: 612

Re: System Generator Error: "Index exceeds matrix dimensions"

You need to make sure that all of the Matlab variables are initialized before opening the MDL file.  In System Generator, you can reference Matlab variables as constants within your model.

If you look in the <WARP Repository>\ResearchApps\PHY\WARPLAB\WARPLab7\Sysgen_Reference\w3\warplab_buffers you can see that along with the MDL file, there is also an M "init" file.  This needs to be run on the Matlab command line in order to populate the Workspace:

Code:

>> w3_warplab_buffers_init

This should allow you to generate the HDL for the model.  We recommend changing the pcore version number, under "Settings" on the "System Generator" dialog if you make any changes to the pcore.  This way it is easier to make sure that you are compiling the correct pcore in your XPS project since it requires an MHS change.  Therefore, you know you are using your pcore vs the current pcore.

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#3 2015-Jul-06 09:13:01

welsh
Administrator
From: Mango Communications
Registered: 2013-May-15
Posts: 612

Re: System Generator Error: "Index exceeds matrix dimensions"

One other thing to note: there are a number of scopes and debug features within the WARPLab Buffers pcore.  We recommend that you use these to help validate any changes you make to the core.  In general, it is much easier to debug changes to the core in simulation vs the WARPLab reference design.

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#4 2015-Jul-07 08:13:43

arinz
Member
Registered: 2015-Jul-06
Posts: 7

Re: System Generator Error: "Index exceeds matrix dimensions"

Thanks for the reply welsh, however I am still receiving the same error. I ran the init.m file and clicked the start simulation button on the system generator model before starting to generate the hdl. Am I missing something?

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#5 2015-Jul-07 09:13:04

welsh
Administrator
From: Mango Communications
Registered: 2013-May-15
Posts: 612

Re: System Generator Error: "Index exceeds matrix dimensions"

What version of the tools are you using?  Also, what version of the files are you using?

For reference, using Xilinx EDK 14.4 and Matlab R2011a, I just ran System Generator the following shortcut:

Code:

C:\Xilinx\14.4\ISE_DS\settings64.bat C:\Xilinx\14.4\ISE_DS\ISE\sysgen\util\startsg.bat simulink nt64

which starts in the directory:

Code:

C:\Xilinx\14.4\ISE_DS\ISE

If you have the WARP Repository installed on your system, you can then change the Matlab working directory to

Code:

<WARP Repository Install Directory>\ResearchApps\PHY\WARPLAB\WARPLab7\Sysgen_Reference\w3\warplab_buffers

Otherwise, you can download the files directly using this link and place them in whatever working directory you want to use.

At this point, you should have the following files:

Code:

w3_warplab_buffers.mdl       SVN Revision:  4366
w3_warplab_buffers_init.m    SVN Revision:  4285

Then in the Matlab Command Window, I run:

Code:

>> w3_warplab_buffers_init

to populate the Workspace.  Then I open the MDL file; double click the "System Generator" icon in the top left corner of the model; and click "Generate".  This then successfully generates the HDL in the "./netlist_v01" directory.

Hopefully, that helps isolate the issue.

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#6 2020-Jul-28 22:55:44

vutran
Member
Registered: 2017-Jul-01
Posts: 47

Re: System Generator Error: "Index exceeds matrix dimensions"

Hi Welsh,

This thread is quite old, but I hope it is still helpful for someone else who has encounter the same issue.
In my case, I have the same issue because the System Generator box in the model is somehow corrupted (maybe because different version). My system is: ISE14.7, Matlab2015a. I have done the following steps to fix
(1) Remove the "system Generator" box and add a new one. Remember to change the settings (Export to pcore & vlx240t-2ff1156). But the new one does not contain the BUS_INTERFACE for the FIFO (the old "system generator" even disable the BUSIF button and shows a blank window). So you need to do step 2:
(2) Add the bus interface in "Systen Generator"/Setting/BusIf. You can add manually or copy from the following text and paste into the window where applicable (note that you have to use "tab" to separate the column). These bus interfaces are meant for 4RF design.
RFA_RX_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFA_TX_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFA_RSSI_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFB_RX_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFB_TX_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFB_RSSI_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFC_RX_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFC_TX_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFC_RSSI_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFD_RX_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFD_TX_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR
RFD_RSSI_PORTB    XIL_BRAM    XIL_AXI_STREAM_ETH_DATA    INITIATOR


RFA_IQ_RX_ADDR    BRAM_Addr    RFA_RX_PORTB
RFA_IQ_RX_WEN    BRAM_WEN    RFA_RX_PORTB
RFA_IQ_RX_DOUT    BRAM_Dout    RFA_RX_PORTB
RFA_IQ_RX_DIN    BRAM_Din    RFA_RX_PORTB
RFA_IQ_RX_ENABLE    BRAM_En    RFA_RX_PORTB
RFA_IQ_RX_RESET    BRAM_Rst    RFA_RX_PORTB
RFA_IQ_TX_ADDR    BRAM_Addr    RFA_TX_PORTB
RFA_IQ_TX_WEN    BRAM_WEN    RFA_TX_PORTB
RFA_IQ_TX_DOUT    BRAM_Dout    RFA_TX_PORTB
RFA_IQ_TX_DIN    BRAM_Din    RFA_TX_PORTB
RFA_IQ_TX_ENABLE    BRAM_En    RFA_TX_PORTB
RFA_IQ_TX_RESET    BRAM_Rst    RFA_TX_PORTB
RFA_RSSI_ADDR    BRAM_Addr    RFA_RSSI_PORTB
RFA_RSSI_WEN    BRAM_WEN    RFA_RSSI_PORTB
RFA_RSSI_DOUT    BRAM_Dout    RFA_RSSI_PORTB
RFA_RSSI_DIN    BRAM_Din    RFA_RSSI_PORTB
RFA_RSSI_ENABLE    BRAM_En    RFA_RSSI_PORTB
RFA_RSSI_RESET    BRAM_Rst    RFA_RSSI_PORTB
RFB_IQ_RX_ADDR    BRAM_Addr    RFB_RX_PORTB
RFB_IQ_RX_WEN    BRAM_WEN    RFB_RX_PORTB
RFB_IQ_RX_DOUT    BRAM_Dout    RFB_RX_PORTB
RFB_IQ_RX_DIN    BRAM_Din    RFB_RX_PORTB
RFB_IQ_RX_ENABLE    BRAM_En    RFB_RX_PORTB
RFB_IQ_RX_RESET    BRAM_Rst    RFB_RX_PORTB
RFB_IQ_TX_ADDR    BRAM_Addr    RFB_TX_PORTB
RFB_IQ_TX_WEN    BRAM_WEN    RFB_TX_PORTB
RFB_IQ_TX_DOUT    BRAM_Dout    RFB_TX_PORTB
RFB_IQ_TX_DIN    BRAM_Din    RFB_TX_PORTB
RFB_IQ_TX_ENABLE    BRAM_En    RFB_TX_PORTB
RFB_IQ_TX_RESET    BRAM_Rst    RFB_TX_PORTB
RFB_RSSI_ADDR    BRAM_Addr    RFB_RSSI_PORTB
RFB_RSSI_WEN    BRAM_WEN    RFB_RSSI_PORTB
RFB_RSSI_DOUT    BRAM_Dout    RFB_RSSI_PORTB
RFB_RSSI_DIN    BRAM_Din    RFB_RSSI_PORTB
RFB_RSSI_ENABLE    BRAM_En    RFB_RSSI_PORTB
RFB_RSSI_RESET    BRAM_Rst    RFB_RSSI_PORTB
RFC_IQ_RX_ADDR    BRAM_Addr    RFC_RX_PORTB
RFC_IQ_RX_WEN    BRAM_WEN    RFC_RX_PORTB
RFC_IQ_RX_DOUT    BRAM_Dout    RFC_RX_PORTB
RFC_IQ_RX_DIN    BRAM_Din    RFC_RX_PORTB
RFC_IQ_RX_ENABLE    BRAM_En    RFC_RX_PORTB
RFC_IQ_RX_RESET    BRAM_Rst    RFC_RX_PORTB
RFC_IQ_TX_ADDR    BRAM_Addr    RFC_TX_PORTB
RFC_IQ_TX_WEN    BRAM_WEN    RFC_TX_PORTB
RFC_IQ_TX_DOUT    BRAM_Dout    RFC_TX_PORTB
RFC_IQ_TX_DIN    BRAM_Din    RFC_TX_PORTB
RFC_IQ_TX_ENABLE    BRAM_En    RFC_TX_PORTB
RFC_IQ_TX_RESET    BRAM_Rst    RFC_TX_PORTB
RFC_RSSI_ADDR    BRAM_Addr    RFC_RSSI_PORTB
RFC_RSSI_WEN    BRAM_WEN    RFC_RSSI_PORTB
RFC_RSSI_DOUT    BRAM_Dout    RFC_RSSI_PORTB
RFC_RSSI_DIN    BRAM_Din    RFC_RSSI_PORTB
RFC_RSSI_ENABLE    BRAM_En    RFC_RSSI_PORTB
RFC_RSSI_RESET    BRAM_Rst    RFC_RSSI_PORTB
RFD_IQ_RX_ADDR    BRAM_Addr    RFD_RX_PORTB
RFD_IQ_RX_WEN    BRAM_WEN    RFD_RX_PORTB
RFD_IQ_RX_DOUT    BRAM_Dout    RFD_RX_PORTB
RFD_IQ_RX_DIN    BRAM_Din    RFD_RX_PORTB
RFD_IQ_RX_ENABLE    BRAM_En    RFD_RX_PORTB
RFD_IQ_RX_RESET    BRAM_Rst    RFD_RX_PORTB
RFD_IQ_TX_ADDR    BRAM_Addr    RFD_TX_PORTB
RFD_IQ_TX_WEN    BRAM_WEN    RFD_TX_PORTB
RFD_IQ_TX_DOUT    BRAM_Dout    RFD_TX_PORTB
RFD_IQ_TX_DIN    BRAM_Din    RFD_TX_PORTB
RFD_IQ_TX_ENABLE    BRAM_En    RFD_TX_PORTB
RFD_IQ_TX_RESET    BRAM_Rst    RFD_TX_PORTB
RFD_RSSI_ADDR    BRAM_Addr    RFD_RSSI_PORTB
RFD_RSSI_WEN    BRAM_WEN    RFD_RSSI_PORTB
RFD_RSSI_DOUT    BRAM_Dout    RFD_RSSI_PORTB
RFD_RSSI_DIN    BRAM_Din    RFD_RSSI_PORTB
RFD_RSSI_ENABLE    BRAM_En    RFD_RSSI_PORTB
RFD_RSSI_RESET    BRAM_Rst    RFD_RSSI_PORTB

(3) After you generate the pcore, the interrupt pin is left without sensitivity. You need to change the following 2 pin in the data/somename.mpd file otherwise the XPS will show an error:
#PORT rf_rx_iq_rssi_int = "", DIR = OUT
PORT rf_rx_iq_rssi_int = "", DIR = OUT, SIGIS = INTERRUPT, SENSITIVITY = EDGE_RISING
#PORT rf_tx_iq_int = "", DIR = OUT
PORT rf_tx_iq_int = "", DIR = OUT, SIGIS = INTERRUPT, SENSITIVITY = EDGE_RISING

Best,
Vu

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