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How to add and edit an IP Version number for a customly built pcore?
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The core's version information is specified in a few places.
1) In the name of the folder containing the pcore itself. This must be named myCore_vX_Y_Z where X is the major version number, Y is the minor version number and Z is the revision letter. For example, myCore_v1_01_a and myCore_v2_08_c are both valid pcore folder names.
2) In the pcore's PAO file. Generally the last line will be something like "lib myCore_v1_01_a myCore verilog". The version number following the library name ("myCore_v1_01_a" in this example") must match the version in pcore's folder name.
3) If the pcore's top-level file is VHDL, there may be lines like "library myCore_v1_01_a" and "use myCore_v1_01_a.all" which must match the pcore's version number. See radio_controller.vhd for an example of this.
You can refer to the EDK's Platform Specification Format Reference Manual for more details on the use and naming of these files. A copy of psf_rm.pdf is probably also installed in C:\EDK\doc\.
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thanks for the reply. I have made modification according to (1) and (2). For (2), there is a line in .pao file -- "lib ddc_opbw_v1_01_a ddc_opbw". However, there is no vhdl or verilog in the end. Since this is VHDL, according to the "Platform Specification Format Reference Manual", I guess this is correct. My .pao file looks like
lib ddc_opbw ddc lib ddc_opbw_v1_01_a ddc_opbw
However, I am not sure about (3), since I couldn't find lines in the .vdh looks like "library myCore_v1_01_a". There are only three libraries: "library IEEE", "library unisim" and "library XilinxCoreLib". Should we add line "library myCore_v1_01_a" by hand, or it is generated automatically?
Without change according to (3), I tried to build the platform and bitstream, I got the following error.
Generating synthesis project file ... ERROR:MDT - File not found in any repository 'ddc_opbw/hdl/vhdl/ddc.vhd' ERROR:MDT - platgen failed with errors! make: *** [implementation/system.bmm] Error 2 Done!
This is apparent, since the folder name has been changed to ddc_opbw_v1_01_a according to (1). So there is no folder called "ddc_opbw". I tried a few ways, including create a brand new project. However, I still get this error message.
Thank you.
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If your core has a version number, you have to include the version in the XPS project's MHS file. The instantiation of your core should look like:
BEGIN myCore_opbw PARAMETER INSTANCE = myCore_opbw_0 PARAMETER HW_VER = 1.03.a ...
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I do have the right code in .mhs file. So I don't think it is the reason. Should I do sth. even before click the sysgen block generate button? The error seems to looking for a folder called 'myCore_opbw' without any version information. Before I click the sysgen block generate button, there is no version information.
BEGIN DDC_opbw PARAMETER INSTANCE = DDC_opbw_0 PARAMETER HW_VER = 1.01.a PARAMETER C_BASEADDR = 0x77800000 PARAMETER C_HIGHADDR = 0x7780ffff BUS_INTERFACE SOPB = opb END
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You need to update both lines of the PAO file. Try:
lib ddc_opbw_v1_01_a ddc lib ddc_opbw_v1_01_a ddc_opbw
zrcao wrote:
Should I do sth. even before click the sysgen block generate button?
You have to make the changes to the pcore's folder name and PAO file by hand; sysgen2opb (really, the OPB Export Tool) doesn't support core versioning.
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