WARP Project Forums - Wireless Open-Access Research Platform

The over-the-air bandwidth is determined by the sampling rate and interpolation/decimation rates implemented in the FPGA. The A/D and D/A converters on the radio board are always clocked at 40MHz; the corresponding FPGA interface (in the radio_bridge) must likewise run at 40MHz. You can control the behavior of any blocks which connect to the user-side ports of the radio_brdige.

You can change the bandwidth by customizing the FPGA designs imlementing the physical layer. The current OFDM PHY interpolates/decimates by 4x to achieve an over-the-air bandwidth of 10MHz (1/4 of 40MHz). The only way to change the actual sampling rate would be to feed an external clock into the node; the clock board supports this via its external clocking interfaces.

You would need to modify the OFDM models, implemented in System Generator. These models are currently built for decimating/interpolating the I/Q sample streams by 4x.

That polyphase filter was designed to implement only a 4x rate change (even though it stubs out the rate change as a parameter). You would need to build a different interpolating filter with the desired rate change, then adjust the sampling periods of the other blocks in the PHY to match the new clock ratios between the core and I/Q ports.

Subcarriers can be disabled from software. The warpphy.c function warpphy_set_modulation() currently sets up 48 data-bearing subcarriers. You can model your customizations on this code.

I strongly recommend experimenting with this in Sysgen simulation first. Getting the modulation masks and other PHY parameters (like packet lengths, number of OFDM symbols, etc.) to line up is way easier in Sysgen than over-the-air.