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Hello,
I am working on implementation of Spectrum Sensing on the WARP board. I have a few questions :
1. How to use the digital data coming after the A/D converter. I cannot understand how my spectrum sense code will get the input data.
2. There are 14 channels with centre frequencies from 2.412Ghz to 2.484Ghz i.e. a bandwidth of around 72Mhz (or slightly more).
The board provides the ADC with sampling rates of 20Mhz, 40 Mhz and 65Mhz only. The bandpass sampling theorem tells us that the sampling
frequency must be twice the bandwidth (or greater), thus a sampling rate of more than 150Mhz is needed. Using the input data I want to sense
the frequency content and thereby find out the usage of the channels. How to go about this implementation with the above issues ?
Any help in this regard will be highly appreciated.
Last edited by Rohan Surana (2009-May-29 05:42:24)
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I have a similar query... While writing my own C-code for spectrum sensing that is done with the RF front end acting as receiver, how exactly do i get the data from the antenna before demodulation takes place in order to sense on which channel the transmission is taking place?
Last edited by Abhinandan (2009-May-29 05:51:48)
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The radio board acts as an up & downconverter. Its baseband interface presents (up to) 40MHz bandwidth which is translated to/from any of the 14 channels in the 2.4GHz band. One radio board cannot access all 14 channels (100+MHz bandwidth) simultaneously. The radio board samples complex baseband at 40Msps, the minimum rate required to access 40MHz bandwidth.
As a general rule, C code running in the FPGA's PowerPC core should not be used for signal processing. If you want to process signals in hardware, you should do it in the FPGA logic. C programs can be used to control the processing chain and to interface with a PC (via Ethernet or UART). Refer to the latest workshop exercises, WARPLab and OFDM reference designs for examples of projects which use this approach.
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Hello,
Thank you for the feedback.
1.As I want to implement spectrum sensing on WARP,I would like to know whether the radio boards can process the channels serially if not simultaneously. If yes, then can you provide some information as to how to proceed. How much latency will be involved ?
2. The signal processing code has to be written in VHDL as it cannot be run on PowerPC ?
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You can change the radio's center frequency with a call to WarpRadio_v1_SetCenterFreq2GHz(); the switching/settling time is around 50µs.
You can use any FPGA design entry method to target the FPGA logic. We use System Generator extensively for PHY design. Verilog and VHDL are also both well supported by the Xilinx tools.
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Hi,
Could you help me with some documentation on how the data chain works (right from reception at antenna) and processing in FPGA logic.
I am confused as to how it actually works and hence am not being able to build the flow diagram for my application (spectrum sensing).
I had a look at the WARP Radio Board Overview but still didn't understand how to feed the data after A/D conversion from daughtercard connectors to the VHDL module implemented as FPGA logic.
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*Please* work through the workshop exercises and tutorials on the WARP site. These are our best introduction to the design flows and repository components you'll need to build custom applications on WARP.
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