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I noticed that the output type for RO register block is UFix_24_0. I am wondering why a 24-bit length is selected? Before using this block, we always use the To Register from Xilinx and select a 32 bit width.
Also, Is 'unsigned' necessary in this case? Maybe it is more convenient to leave this choice to the users.
Thanks.
Last edited by zrcao (2007-May-21 13:48:02)
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The RO register block (from the sysgen2opb blockset in the WARP Simulink library) has no output. The To Register inside the RO register block masked subsystem inherits the type of the subsystem's only input.
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