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I followed the instruction in the following link and use edk_user_repository to generate bitstream.
http://warp.rice.edu/svn/WARP/Documenta … Intro.html
I am using board v2.2 and I got a problem when I use BSB to generate bitstream. Here is the error message:
Checking platform configuration ...
ERROR:EDK:1555 - IPNAME:clock_board_config INSTANCE:clk_board_config
PORT:config_invalid -
C:\WARP_Repository\edk_user_repository\WARP\pcores\clock_board_config_v1_04_a\data\clock_board_config_v2_1_0.mpd line 79 - ASSIGNMENT=REQUIRE is defined
in the MPD. You must specify a connection in the MHS.
Many thanks for your help in advance.
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The short answer is you need to make a new connection in the XPS system assembly view:
clk_board_config.config_invalid -> clock_generator_0.RST
Choose 'New Connection' for the config_invalid port; this will assign a net name. Then choose the same net name for the clock_generator_0.RST port.
That tutorial was written for the v1 FPGA board and constructs a project which doesn't use the clock board (it uses the FPGA board's own oscillator, only possible because no radio boards are used). For projects that use the clock board, Base System Builder includes a custom core used to configure the clock board on boot. This configuration process must complete before the FPGA tries to use the resulting clock. This delay is achieved by holding the FPGA's clock managers (the DCMs) in reset during the configuration. The clock configuration core (clk_board_config) asserts its config_invalid output until it's finished. This output must be connected to the DCM reset ports (clock_generator_0.RST) to assure the design boots reliably. XPS enforces this requirement by refusing to build a project with a floating connection for the clk_board_config.config_invalid port.
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Hi i am getting the following error while generating bitstream:
INFO:coreutil - No license for component <xps_ll_temac_v1> found. You may use
the customization GUI for this component but you will not be able to generate
any implementation or simulation files.
For license installation help, please visit:
www.xilinx.com/ipcenter/ip_license/ip_l … g_help.htm
For ordering information, please refer to the product page for this component
on: www.xilinx.com FLEXlm Error: No such feature exists. (-5,21)
ERROR:MDT - IPNAME:xps_ll_temac INSTANCE:TriMode_MAC_MII -
C:\REF\OFDM_ReferenceDesign_FPGAv1_v14.0_public\system.mhs line 289 - invalid
license or no license found!
ERROR:MDT - platgen failed with errors!
make: *** [implementation/system.bmm] Error 2
Done!
Any ideas how to solve this ?
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You will need to generate a site license for the xps_ll_temac core for your computers. This is free of charge and can be done online at http://license.xilinx.com/getLicense?gr … t=0451141. In the 'create new license' tab click on the No Charge license button and search for TEMAC. This will get you an evaluation license for the TEMAC core and you will be able to generate bitstreams.
The one caveat is that since it is an evaluation license the core might stop running 8 hours into a test. We are still investigating if this is true or not. Let us know what you see with this as well.
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Just to clarify- the 8 hour timeout (if it's even there; the Xilinx docs are ambiguous, as usual) resets when the FPGA is re-programmed. Unless you're running day-long tests without reconfiguring the FPGA, it won't be an issue (again, if it's even there).
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An update on the timeout: the TEMAC core will stop working in about 9 hours (with an 80MHz bus clock) if you download the free evaluation license from the Xilinx Entitlement Center. A reconfiguration should fix this.
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Sir,
previously we were working on reference design 12.1 with WARP boards (ver 1.2), Now we want to shift to OFDM reference design 14.0, we are using xilinx 10.1.03.
while generating hardware bitstream we are getting following errors
-------------------------------------------------------------------------------------------------------------------------
Parse system.mhs ...
Read MPD definitions ...
ERROR:MDT - wrong # args: should be "source fileName"
while executing
"source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/ofdm_txrx_supermimo_p
lbw_v2_01_r/data/ofdm_txrx_supermimo_plbw_v2_1_0..."
(in namespace eval "::hw_ofdm_txrx_supermimo_plbw_v2_01_r" script line 1)
invoked from within
"namespace eval hw_ofdm_txrx_supermimo_plbw_v2_01_r source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/ofdm_txrx_supermim...
"
ERROR:MDT - wrong # args: should be "source fileName"
while executing
"source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/warp_timer_plbw_v1_02
_b/data/warp_timer_plbw_v2_1_0.tcl"
(in namespace eval "::hw_warp_timer_plbw_v1_02_b" script line 1)
invoked from within
"namespace eval hw_warp_timer_plbw_v1_02_b source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/warp_timer_plbw_v1_02
_b/dat..."
ERROR:MDT - wrong # args: should be "source fileName"
while executing
"source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/ofdm_agc_mimo_plbw_v1
_02_a/data/ofdm_agc_mimo_plbw_v2_1_0.tcl"
(in namespace eval "::hw_ofdm_agc_mimo_plbw_v1_02_a" script line 1)
invoked from within
"namespace eval hw_ofdm_agc_mimo_plbw_v1_02_a source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/ofdm_agc_mimo_plbw_v1
_02..."
ERROR:MDT - wrong # args: should be "source fileName"
while executing
"source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/user_io_board_control
ler_plbw_v1_01_a/data/user_io_board_controller_p..."
(in namespace eval "::hw_user_io_board_controller_plbw_v1_01_a" script
line 1)
invoked from within
"namespace eval hw_user_io_board_controller_plbw_v1_01_a source D:/ofdm
reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/user_io_board..."
ERROR:MDT - wrong # args: should be "source fileName"
while executing
"source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/ofdm_txrx_supermimo_p
lbw_v2_01_r/data/ofdm_txrx_supermimo_plbw_v2_1_0..."
(in namespace eval "::hw_ofdm_txrx_supermimo_plbw_v2_01_r" script line 1)
invoked from within
"namespace eval hw_ofdm_txrx_supermimo_plbw_v2_01_r source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/ofdm_txrx_supermim...
"
ERROR:MDT - wrong # args: should be "source fileName"
while executing
"source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/warp_timer_plbw_v1_02
_b/data/warp_timer_plbw_v2_1_0.tcl"
(in namespace eval "::hw_warp_timer_plbw_v1_02_b" script line 1)
invoked from within
"namespace eval hw_warp_timer_plbw_v1_02_b source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/warp_timer_plbw_v1_02
_b/dat..."
ERROR:MDT - wrong # args: should be "source fileName"
while executing
"source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/ofdm_agc_mimo_plbw_v1
_02_a/data/ofdm_agc_mimo_plbw_v2_1_0.tcl"
(in namespace eval "::hw_ofdm_agc_mimo_plbw_v1_02_a" script line 1)
invoked from within
"namespace eval hw_ofdm_agc_mimo_plbw_v1_02_a source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/ofdm_agc_mimo_plbw_v1
_02..."
ERROR:MDT - wrong # args: should be "source fileName"
while executing
"source D:/ofdm reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/user_io_board_control
ler_plbw_v1_01_a/data/user_io_board_controller_p..."
(in namespace eval "::hw_user_io_board_controller_plbw_v1_01_a" script
line 1)
invoked from within
"namespace eval hw_user_io_board_controller_plbw_v1_01_a source D:/ofdm
reference
designs/OFDM_ReferenceDesign_FPGAv1_v14.0_public/pcores/user_io_board..."
Overriding IP level properties ...
--------------------------------------------------------------------------------------------------------------------------------------------
finally we are getting
-----------------------------------------------------------------------------
INFO:coreutil - No license for component <xps_ll_temac_v1> found. You may use
the customization GUI for this component but you will not be able to generate
any implementation or simulation files.
For license installation help, please visit:
www.xilinx.com/ipcenter/ip_license/ip_l … g_help.htm
For ordering information, please refer to the product page for this component
on: www.xilinx.com FLEXlm Error: No such feature exists. (-5,21)
ERROR:MDT - IPNAME:xps_ll_temac INSTANCE:TriMode_MAC_MII - D:\ofdm reference
designs\OFDM_ReferenceDesign_FPGAv1_v14.0_public\system.mhs line 289 -
invalid license or no license found!
ERROR:MDT - platgen failed with errors!
make: *** [implementation/system.bmm] Error 2
Done!
-----------------------------------------------------------------------------------------
for the second error we generated an evaluation license(as per instructions above) and put that file into C:\Xilinx\ISE\coregen\core_licenses directory.
But still we are getting the same error.
Any Ideas??
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The Xilinx tools require project paths with no spaces ("D:\ofdm reference designs\" won't work).
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Thanks for the help..we got that thing resolved..
But the second error is still there
------------------------------------------------------------------------------------------------
INFO:coreutil - No license for component <xps_ll_temac_v1> found. You may use
the customization GUI for this component but you will not be able to generate
any implementation or simulation files.
For license installation help, please visit:
www.xilinx.com/ipcenter/ip_license/ip_l … g_help.htm
For ordering information, please refer to the product page for this component
on: www.xilinx.com FLEXlm Error: No such feature exists. (-5,21)
ERROR:MDT - IPNAME:xps_ll_temac INSTANCE:TriMode_MAC_MII -
D:\OFDM_ReferenceDesign_FPGAv1_v14.0_public\system.mhs line 289 - invalid
license or no license found!
ERROR:MDT - platgen failed with errors!
make: *** [implementation/system.bmm] Error 2
Done!
--------------------------------------------------------------------------------
I got an evaluation license from Xilinx website. I am using EDK 10.1.03
I followed the license installation steps as mentioned in http://www.xilinx.com/ipcenter/ip_licen … o_10.1.htm
But we don't have any such folder (C:\.Xilinx\Coregen\CoreLicenses\ ) where we could put the license. Instead we have a folder (C:\Xilinx\ISE\coregen\core_licenses) and I put the license file in this folder but still the same error.
Please Help!!
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I believe that you will need to create the folder C:\.Xilinx\Coregen\CoreLicenses. That might fix it.
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This sounds pretty much like the problem we had.
The EDK was always picking up the default license which came with the installation
- which, in our case had expired in June 2009.
Finally, we had to get new license files from the vendor (xps_ll_temac_flexlm.lic, xps_ll_temac_v1_flexlm.lic
and xps_ll_temac_v2_flexlm.lic) which had valid expiry dates.
(These files have line 1 : FEATURE xps_ll_temac_v1 xilinxd 1.0 30-jun-2010 uncounted \....
or
INCREMENT xps_ll_temac xilinxd 2009.09 30-jun-2010 uncounted \...)
In EDK, look under Hardware->Check and View Core Licenses.
Place the new license files in the flex lm cache dir named therein.
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Thanks for the help..
We got the issue resolved... From the location mentioned (Hardware-->Check and View core licenses) we found the error. The location where we were putting the license was correct . The problem was we generated node locked licenses and node id in the license was not matching.
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I have similar problem. I downloaded the license file and put it in the correct directory. I have also checked and host id and host name are matching. But still I get the same error? Does anybody have any idea why it might be? Thanks.
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