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The current OFDM reference design is using the XLLTEMAC ethernet core, which in theory can reach 1000Mbit/s. But in WARP fpga2.2 board, the PPC405 works under 40Mhz clock rate. How fast this 1Gigbit ethernet core can realy reach?
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In the OFDM ref design the PPC is clocked at 240MHz and the primary PLB (hosting the TEMAC) is clocked at 80MHz. The TEMAC is capable of tx/rx frames at the line rate; the bottleneck will be whatever code/design you use to generate/process Ethernet frames.
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