Changes between Version 25 and Version 26 of 802.11/ResourceUsage
- Timestamp:
- Jul 1, 2016, 2:37:44 PM (8 years ago)
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802.11/ResourceUsage
v25 v26 13 13 14 14 ||= Resource =||= Used =|| 15 || Slice Registers || 7 7,280 out of 301,440 (25%) ||16 || LUTs || 7 0,086 out of 150,720 (46%) ||17 || Block RAMs (see note 1) || 2 58 of 416 (62%) ||18 || DSP48 (multipliers) || 1 70 of 768 (22%) ||15 || Slice Registers || 79,221 out of 301,440 (26%) || 16 || LUTs || 71,193 out of 150,720 (47%) || 17 || Block RAMs (see note 1) || 261 of 416 (63%) || 18 || DSP48 (multipliers) || 182 of 768 (23%) || 19 19 || MMCM_ADV || 3 of 12 (25%) || 20 20 || Ethernet MAC || 2 of 4 (50%) || … … 37 37 ------------------ 38 38 Command Line : map -mt 4 -o system_map.ncd -w -pr b -ol high -t 13 -register_duplication on -timing -detail system.ngd 39 40 39 system.pcf 41 40 Target Device : xc6vlx240t … … 43 42 Target Speed : -2 44 43 Mapper Version : virtex6 -- $Revision: 1.55 $ 45 Mapped Date : Sun Mar 06 16:30:27 201646 44 47 45 Design Summary 48 46 -------------- 49 47 Number of errors: 0 50 Number of warnings: 3 4448 Number of warnings: 352 51 49 Slice Logic Utilization: 52 Number of Slice Registers: 7 7,280 out of 301,440 25%53 Number used as Flip Flops: 7 7,11250 Number of Slice Registers: 79,221 out of 301,440 26% 51 Number used as Flip Flops: 79,059 54 52 Number used as Latches: 4 55 53 Number used as Latch-thrus: 0 56 Number used as AND/OR logics: 1 6457 Number of Slice LUTs: 7 0,086 out of 150,720 46%58 Number used as logic: 5 7,505out of 150,720 38%59 Number using O6 output only: 4 3,94660 Number using O5 output only: 1,4 6461 Number using O5 and O6: 12, 09554 Number used as AND/OR logics: 158 55 Number of Slice LUTs: 71,193 out of 150,720 47% 56 Number used as logic: 58,524 out of 150,720 38% 57 Number using O6 output only: 44,685 58 Number using O5 output only: 1,486 59 Number using O5 and O6: 12,353 62 60 Number used as ROM: 0 63 Number used as Memory: 7, 590 out of 58,400 12%61 Number used as Memory: 7,870 out of 58,400 13% 64 62 Number used as Dual Port RAM: 2,522 65 63 Number using O6 output only: 1,546 … … 70 68 Number using O5 output only: 0 71 69 Number using O5 and O6: 12 72 Number used as Shift Register: 5, 03773 Number using O6 output only: 4, 77674 Number using O5 output only: 1 775 Number using O5 and O6: 24476 Number used exclusively as route-thrus: 4, 99177 Number with same-slice register load: 4,21078 Number with same-slice carry load: 31679 Number with other load: 4 6570 Number used as Shift Register: 5,317 71 Number using O6 output only: 4,877 72 Number using O5 output only: 18 73 Number using O5 and O6: 422 74 Number used exclusively as route-thrus: 4,799 75 Number with same-slice register load: 3,832 76 Number with same-slice carry load: 497 77 Number with other load: 470 80 78 81 79 Slice Logic Distribution: 82 Number of occupied Slices: 28, 289 out of 37,680 75%83 Number of LUT Flip Flop pairs used: 89,39684 Number with an unused Flip Flop: 22, 638 out of 89,396 25%85 Number with an unused LUT: 19,310 out of 89,396 21%86 Number of fully used LUT-FF pairs: 4 7,448 out of 89,39653%87 Number of unique control sets: 2,8 5080 Number of occupied Slices: 28,957 out of 37,680 76% 81 Number of LUT Flip Flop pairs used: 91,640 82 Number with an unused Flip Flop: 22,592 out of 91,640 24% 83 Number with an unused LUT: 20,447 out of 91,640 22% 84 Number of fully used LUT-FF pairs: 48,601 out of 91,640 53% 85 Number of unique control sets: 2,849 88 86 Number of slice register sites lost 89 to control set restrictions: 10,6 33out of 301,440 3%87 to control set restrictions: 10,676 out of 301,440 3% 90 88 91 89 A LUT Flip Flop pair for this architecture represents one LUT paired with … … 105 103 106 104 Specific Feature Utilization: 107 Number of RAMB36E1/FIFO36E1s: 24 0 out of 416 57%108 Number using RAMB36E1 only: 24 0105 Number of RAMB36E1/FIFO36E1s: 243 out of 416 58% 106 Number using RAMB36E1 only: 243 109 107 Number using FIFO36E1 only: 0 110 Number of RAMB18E1/FIFO18E1s: 3 5out of 832 4%111 Number using RAMB18E1 only: 3 5108 Number of RAMB18E1/FIFO18E1s: 36 out of 832 4% 109 Number using RAMB18E1 only: 36 112 110 Number using FIFO18E1 only: 0 113 111 Number of BUFG/BUFGCTRLs: 9 out of 32 28% … … 126 124 Number of LOCed BUFRs: 2 out of 5 40% 127 125 Number of CAPTUREs: 0 out of 1 0% 128 Number of DSP48E1s: 1 70 out of 768 22%126 Number of DSP48E1s: 182 out of 768 23% 129 127 Number of EFUSE_USRs: 0 out of 1 0% 130 128 Number of FRAME_ECCs: 0 out of 1 0% … … 142 140 143 141 Number of RPM macros: 15 144 Average Fanout of Non-Clock Nets: 3.5 8142 Average Fanout of Non-Clock Nets: 3.55 145 143 }}} 146 144