| 19 | | ''Note: These tools are used only for Xilinx versions 9 and lower. As of version 10.1.02, Xilinx has added a stable EDK export flow to System Generator. The new flow creates a PLB46 slave interface with access to registers, FIFOs and shared memory blocks in the user design. This flow completely replaces sysgen2opb and the OPB Export Tool. As a result, these tools are no longer maintained.'' |
| | 19 | * [wiki:WARPBlockset WARP Blockset] - Additional blocks over System Generator that enable the use of the Radio Boards from user designs |
| | 20 | |
| | 21 | '''''Note''': The following tools are used only for Xilinx versions 9 and lower. As of version 10.1.02, Xilinx has added a stable EDK export flow to System Generator. The new flow creates a PLB46 slave interface with access to registers, FIFOs and shared memory blocks in the user design. This flow completely replaces sysgen2opb and the OPB Export Tool. As a result, these tools are no longer maintained.'' |
