Changes between Version 13 and Version 14 of CustomPeriphs


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Timestamp:
Sep 3, 2008, 11:50:48 AM (16 years ago)
Author:
sgupta
Comment:

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  • CustomPeriphs

    v13 v14  
    33== Interface Cores ==
    44
    5  * [wiki:RadioController Radio Controller] - Utilizes the SPI registers on the [wiki:HardwareUsersGuides/RadioBoard_v1.4 Radio Board] and other pins to directly control the Radio Board. It connects through the Radio Bridge.
    6  * [wiki:RadioBridge Radio Bridge] - Maps all the pins of the [wiki:HardwareUsersGuides/RadioBoard_v1.4 Radio Board] to user ports and to connect to the Radio Controller.
    7  * [wiki:HardwareUsersGuides/AnalogBoard_v1.1/Software Analog Bridge] - Maps the pins of the [wiki:HardwareUsersGuides/AnalogBoard_v1.1 Analog Board] to user ports.
     5 * [wiki:HardwareUsersGuides/RadioBoard_v1.4/RadioController Radio Controller] - Utilizes the SPI registers on the [wiki:HardwareUsersGuides/RadioBoard_v1.4 Radio Board] and other pins to directly control the Radio Board. It connects through the Radio Bridge.
     6 * [wiki:HardwareUsersGuides/RadioBoard_v1.4/RadioBridge Radio Bridge] - Maps all the pins of the [wiki:HardwareUsersGuides/RadioBoard_v1.4 Radio Board] to user ports and to connect to the Radio Controller.
     7 * [wiki:HardwareUsersGuides/AnalogBoard_v1.1/AnalogBridge Analog Bridge] - Maps the pins of the [wiki:HardwareUsersGuides/AnalogBoard_v1.1 Analog Board] to user ports.
    88 * [wiki:HardwareUsersGuides/UserIOBoard_v1.0/Controller User I/O Controller] - Provides drivers and hardware to control the LCD, Buzzer, LEDs etc. on the [wiki:HardwareUsersGuides/UserIOBoard_v1.0 User I/O Board].
    99 * [wiki:EEPROM] - Core used to access the EEPROM devices located on the WARP FPGA and WARP radio boards.
    … …  
    1717== System Generator Tools ==
    1818
    19  * [wiki:WARPBlockset WARP Blockset] - Additional blocks over System Generator that enable the use of the Radio Boards from user designs
     19 * [wiki:WARPBlockset WARP Blockset] - Additional blocks over System Generator that enable the use of the Radio Boards from user designs.
    2020
    21 '''''Note''': The following tools are used only for Xilinx versions 9 and lower. As of version 10.1.02, Xilinx has added a stable EDK export flow to System Generator. The new flow creates a PLB46 slave interface with access to registers, FIFOs and shared memory blocks in the user design. This flow completely replaces sysgen2opb and the OPB Export Tool. As a result, these tools are no longer maintained.''
     21'''''Note''': The following tools are used only for Xilinx versions 9.1 and lower. As of version 10.1.02, Xilinx has added a stable EDK export flow to System Generator. The new flow creates a PLB46 slave interface with access to registers, FIFOs and shared memory blocks in the user design. This flow completely replaces sysgen2opb and the OPB Export Tool. As a result, these tools are no longer maintained.''
    2222
    2323 * [wiki:sysgen2opb sysgen2opb] - Adds the OPB interface to custom sysgen cores.