Physical Layer Development on WARP

The Xilinx Virtex-II Pro on the FPGA board is well-suited to the DSP heavy-lifting required by modern physical layer designs. This page is intended to outline some basic requirements that users' PHYs must meet in order to interface with the WARP Platform Support Packages.

What we provide

• WARP FPGA Board XBD? - WARP FPGA Board description file for Xilinx Platform Studio
• sysgen2opb - Matlab script to convert System Generator hardware co-simulation models into OPB peripherals
• Custom Peripherals
  • Radio Controller? - core and driver for controlling the WARP radio board
  • Radio Bridge? - core used to interface the radio controller to the underlying hardware
  • EEPROM - core used to access the EEPROM devices located on the WARP FPGA and WARP radio boards.
  • Browse All Peripherals in the WARP Repository

Requirements for PHY

Exercises

• Introduction to sysgen2opb​ (0.1MB PDF) Lab 2 Files​ (4.5MB ZIP)
• Building a Simple Transmitter​ (0.1MB PDF) Lab 3 Files​ (7.6MB ZIP)