Changes between Initial Version and Version 1 of HardwareUsersGuides/FPGABoard_v2.2/TemplateProjects

Timestamp:

Dec 2, 2012, 8:42:42 PM (11 years ago)

Author:

murphpo

Comment:

--

HardwareUsersGuides/FPGABoard_v2.2/TemplateProjects

@@ +1 @@
+[[TracNav(HardwareUsersGuides/WARPv3/TOC)]]
+= WARP v2 User Guide: Template Projects =
+
+The following template projects demonstrate how to use the various peripherals on a WARP MIMO Kit v2 board and are good starting points for your custom designs.
+
+The projects are grouped by the version of Xilinx ISE used. We will update this page as we port the template projects to newer releases of ISE.
+
+----
+
+== Xilinx ISE 13.4 ==
+
+=== Basic Peripherals Template Project ===
+{{{
+#!html
+<table align=right border=0 cellspacing=0 padding=0>
+<tr><td align=center>
+}}}
+
+[[Image(onboardperiph.png,width=300)]]
+
+{{{
+#!html
+</td></tr>
+<tr><td align=center>
+}}}
+
+[attachment:onboardperiph.png Enlarge] | [raw-attachment:onboardperiph.pdf View PDF]
+
+{{{
+#!html
+</td></tr></table>
+}}}
+
+This is an XPS/SDK project which implements peripheral cores to interface with most peripherals on the WARP MIMO Kit v2, including:
+ * PowerPC 405 hard processor core (big-endian, PLB-based design)
+ * Block RAM for instruction/data memory
+ * User I/O (LEDs, buttons, UART)
+ * Tri-speed Ethernet interface
+ * Peripherals for dual RF interface control (assumes Radio Boards in slots 2-3)
+
+Version information:
+||= Project Version =||= ISE Version =||= Arch =||= EDK Project Download =||
+|| 1.0 || 13.4 || PPC/PLB || [http://warp.rice.edu/dl/refdes/template/w2_templateProject_2R_v1p0.zip w2_templateProject_2R_v1p0.zip] || 
+
+We recommend downloading the latest version of this project that matches the version of the ISE tools you have installed.
+
+'''Release Notes:'''
+
+* v1.0 (Dec 2012)
+   * Initial relase of template project
+
+{{{
+#!html
+<br clear=right>
+}}}