wiki:HardwareUsersGuides/FPGABoard_v2.2/TemplateProjects

WARP v2 User Guide: Template Projects

The following template projects demonstrate how to use the various peripherals on a WARP MIMO Kit v2 board and are good starting points for your custom designs.

The projects are grouped by the version of Xilinx ISE used. We will update this page as we port the template projects to newer releases of ISE.


Xilinx ISE 13.4

Basic Peripherals Template Project

This is an XPS/SDK project which implements peripheral cores to interface with most peripherals on the WARP MIMO Kit v2, including:

  • PowerPC 405 hard processor core (big-endian, PLB-based design)
  • Block RAM for instruction/data memory
  • User I/O (LEDs, buttons, UART)
  • Tri-speed Ethernet interface
  • Peripherals for dual RF interface control
    • Radio Controller (to configure Radio Boards)
    • 2 Radio Bridges (slots 2-3)

Version information:

Project Version ISE Version Arch EDK Project Download
1.1 13.4 PPC/PLB w2_TemplateProject_2RF_v1p1.zip

We recommend downloading the latest version of this project that matches the version of the ISE tools you have installed.

Release Notes:

  • v1.1 (Dec 2012)
    • Updated C example to be in-line with Getting Started documents
  • v1.0 (Dec 2012)
    • Initial relase of template project

Last modified 8 years ago Last modified on Jan 9, 2013, 11:28:21 AM