Changes between Initial Version and Version 1 of HardwareUsersGuides/FPGABoard_v2.2/UserIO


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Timestamp:
Sep 6, 2009, 5:16:41 PM (15 years ago)
Author:
murphpo
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  • HardwareUsersGuides/FPGABoard_v2.2/UserIO

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     1[[TracNav(HardwareUsersGuides/FPGABoard_v2.2/TOC)]]
     2
     3== WARP FPGA Board User I/O ==
     4[[Image(HardwareUsersGuides/FPGABoard_v2.2/Images:FPGA_Board_UserIO.jpg, align=right, 300)]]
     5
     6The FPGA board includes a variety of interactive I/O devices, referred to as User I/O. These interfaces are intended to aid with observing and debugging custom designs in hardware.
     7
     8=== Push Buttons ===
     9Five push buttons are connected to dedicated FPGA inputs and are arranged in a cross. They are generally referred as up, down, left, right and center. The buttons are normally open connections with external pull down resistors. Thus, the FPGA will observe logic high when a button is pressed, logic low otherwise.
     10
     11The switches are debounced by a simple low pass filter on the board, but user applications which are sensitive to accidental or repeated rising edges should further debounce the input digitally.
     12
     13In our standard EDK designs, the down button is assigned to the PowerPC's soft reset input. When pushed and released, the PowerPC will reset and re-enter the user's main() function. If desired, the choice of the reset button can be changed in an EDK project's hardware specification.
     14
     15=== DIP Switch ===
     16The 4-position DIP switch drives four dedicated inputs on the FPGA. Sliding a switch to the left drives the input to logic low; to the right drives the input to logic high.
     17
     18=== LEDs ===
     19There are 16 LEDs which can be controlled from user designs.
     20
     21Eight of these are connected to dedicated FPGA I/O pins- four green, four red.
     22
     23An additional eight LEDs, all yellow, are connected to the FPGA through an I2C I/O expander (MAX7318, component U39). User designs must use an I2C master in the FPGA to control these LEDs.
     24
     25=== Seven Segment Displays ===
     26There are three 7-segment displays on the FPGA board. All three are connected to the FPGA through I2C I/O expanders. User designs must use an I2C master in the FPGA to control the displays.
     27
     28Each display includes eight LED elements- seven forming segments of a numerical digit and one acting as a small decimal point. Each element is controlled individually by separate bits in the I2C I/O expander's register bank.
     29
     30Your applicaiton must handle the mapping of hexadecimal digits to the 7 LED segments. Example Verilog and C code is included below which implements this mapping.
     31
     32[[Image(HardwareUsersGuides/FPGABoard_v2.2/Images:FPGA_Board_7seg.jpg, align=center, 150)]]
     33
     34'''Verilog Hex -> Seven Segment Mapping Example'''
     35{{{
     36#!verilog
     37module sevenSegmentMap
     38(
     39        input   [3:0]   fourBitInput,
     40        output  [6:0]   hexDisplay
     41);
     42
     43reg     [6:0]   hexDisplay;
     44
     45always @(fourBitInput[3:0])
     46        case (fourBitInput[3:0])
     47                4'b0001 : hexDisplay = ~(7'b1111001);   // 1
     48                4'b0010 : hexDisplay = ~(7'b0100100);   // 2
     49                4'b0011 : hexDisplay = ~(7'b0110000);   // 3
     50                4'b0100 : hexDisplay = ~(7'b0011001);   // 4
     51                4'b0101 : hexDisplay = ~(7'b0010010);   // 5
     52                4'b0110 : hexDisplay = ~(7'b0000010);   // 6
     53                4'b0111 : hexDisplay = ~(7'b1111000);   // 7
     54                4'b1000 : hexDisplay = ~(7'b0000000);   // 8
     55                4'b1001 : hexDisplay = ~(7'b0010000);   // 9
     56                4'b1010 : hexDisplay = ~(7'b0001000);   // A
     57                4'b1011 : hexDisplay = ~(7'b0000011);   // b
     58                4'b1100 : hexDisplay = ~(7'b1000110);   // C
     59                4'b1101 : hexDisplay = ~(7'b0100001);   // d
     60                4'b1110 : hexDisplay = ~(7'b0000110);   // E
     61                4'b1111 : hexDisplay = ~(7'b0001110);   // F
     62                default : hexDisplay = ~(7'b1000000);   // 0
     63        endcase
     64endmodule
     65}}}
     66
     67'''C Hex -> Seven Segment Mapping Example'''
     68{{{
     69#!C
     70unsigned char sevenSegmentMap(unsigned char x)
     71{
     72        switch(x)
     73        {
     74                case(0x0) : return 0x007E;
     75                case(0x1) : return 0x0030;
     76                case(0x2) : return 0x006D;
     77                case(0x3) : return 0x0079;
     78                case(0x4) : return 0x0033;
     79                case(0x5) : return 0x005B;
     80                case(0x6) : return 0x005F;
     81                case(0x7) : return 0x0070;
     82                case(0x8) : return 0x007F;
     83                case(0x9) : return 0x007B;
     84
     85                case(0xA) : return 0x0077;
     86                case(0xB) : return 0x007F;
     87                case(0xC) : return 0x004E;
     88                case(0xD) : return 0x007E;
     89                case(0xE) : return 0x004F;
     90                case(0xF) : return 0x0047;
     91                default   : return 0x0000;
     92        }
     93}
     94}}}