Changes between Version 5 and Version 6 of HardwareUsersGuides/WARPv3/FPGAConfig


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Timestamp:
Aug 25, 2012, 10:20:26 PM (12 years ago)
Author:
murphpo
Comment:

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  • HardwareUsersGuides/WARPv3/FPGAConfig

    v5 v6  
    2222
    2323=== Selecting SD Card for Configuration ===
    24 To select the SD card as the configuration source, set position 1 of DIP SW SW2 to 0.
    25 '''picture here'''
     24To select the SD card as the configuration source, set position 1 of DIP SW SW2 to 0, as illustrated below.
     25
     26[[Image(wiki:HardwareUsersGuides/WARPv3/files:w3_configDIP_SDslot0.jpg, nolink)]]
     27
    2628
    2729The WARP v3 configuration PLD implements the following behavior in this mode:
    … …  
    3234 * The '''ERR''' LED (D18) will illuminate if an error is detected during configuration. The most likely cause of errors is an invalid FPGA configuration bitstream stored in the SPI flash.
    3335
    34 Positions 2-4 of the DIP switch select which file on the SD card is used for configuration.
    35 '''picture here'''
     36Positions 2-4 of the DIP switch select which configuraiton slot on the SD card should be used for configuration. For example, to select slot 2 on the SD card, set the DIP switch to:
     37
     38[[Image(wiki:HardwareUsersGuides/WARPv3/files:w3_configDIP_SDslot2.jpg, nolink)]]
    3639
    3740For instructions on writing configuration files to an SD card, see the [wiki:howto/SD_Config SD Config Howto].
    … …  
    4346
    4447=== Selecting SPI Flash for Configuration ===
    45 To select the SPI Flash as the configuration source, set position 1 of DIP SW SW2 to 1.
    46 ''photo here''
     48To select the SPI Flash as the configuration source, set position 1 of DIP SW SW2 to 1, as illustrated below.
     49
     50[[Image(wiki:HardwareUsersGuides/WARPv3/files:w3_configDIP_SPIFlash.jpg, nolink)]]
    4751
    4852The WARP v3 configuration PLD implements the following behavior in this mode:
    … …  
    5357 * The '''ERR''' LED (D18) will illuminate if an error is detected during configuration. The most likely cause of errors is an invalid FPGA configuration bitstream stored in the SPI flash.
    5458
    55 
     59For instructions on writing a configuration file to the SPI flash, see the [wiki:howto/SPI_Flash_Config SPI Flash Config Howto].
    5660
    5761----