Changes between Version 1 and Version 2 of HardwareUsersGuides/WARPv3/RF


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Timestamp:
Jul 28, 2012, 9:32:03 PM (12 years ago)
Author:
murphpo
Comment:

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  • HardwareUsersGuides/WARPv3/RF

    v1 v2  
    11[[TracNav(HardwareUsersGuides/WARPv3/TOC)]]
    22== WARP v3 User Guide: RF Interfaces ==
     3'''Coming soon'''
    34
     5----
    46
    57== Tx DCO Calibration ==
    … …  
    1517The WARP v3 design uses auxiliary DACs in the AD9963 to apply small DC offsets to the differential I/Q DAC outputs. The auxiliary DACs are configured via SPI. The [wiki:/cores/ad_controller ad_controller] driver provides functions for writing the DAC values from user code.
    1618
    17 User designs should read Tx DCO calibration values from the EEPROM and update the AD9963 auxiliary DACs on every boot. Reference code implementing this process is included below. This function is provided by the [wiki:/cores/radio_controller radio_controller] driver.
    18 
    19 {{{
    20 #!C
    21 int radioController_apply_TxDCO_calibration(u32 ad_controller_baseaddr, u32 iic_master_baseaddr, u32 rfSel) {
    22         u16 rI, rQ;
    23 
    24         //For each radio interface specified by rfSel:
    25         // -Read the I/Q TxDCO calibration values from the EEPROM (two u16 values)
    26         // -Apply the TxDCO calibration values via the ad_controller driver
    27         //The RC_EEPROM_TXDCO_ADDR_RFx_x macros are defined in radio_controller.h
    28         if(rfSel & RC_RFA) {
    29                 rI = IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFA_I) + (IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFA_I+1)<<8);
    30                 rQ = IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFA_Q) + (IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFA_Q+1)<<8);
    31        
    32                 ad_set_TxDCO(ad_ba, RFA_AD_CS, AD_CHAN_I, rI);
    33                 ad_set_TxDCO(ad_ba, RFA_AD_CS, AD_CHAN_Q, rQ);
    34         }
    35         if(rfSel & RC_RFB) {
    36                 rI = IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFB_I) + (IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFB_I+1)<<8);
    37                 rQ = IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFB_Q) + (IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFB_Q+1)<<8);
    38        
    39                 ad_set_TxDCO(ad_ba, RFB_AD_CS, AD_CHAN_I, rI);
    40                 ad_set_TxDCO(ad_ba, RFB_AD_CS, AD_CHAN_Q, rQ);
    41         }
    42         if(rfSel & RC_RFC) {
    43                 rI = IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFC_I) + (IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFC_I+1)<<8);
    44                 rQ = IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFC_Q) + (IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFC_Q+1)<<8);
    45        
    46                 ad_set_TxDCO(ad_ba, AD3_CS, AD_CHAN_I, rI);
    47                 ad_set_TxDCO(ad_ba, AD3_CS, AD_CHAN_Q, rQ);
    48         }
    49         if(rfSel & RC_RFD) {
    50                 rI = IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFD_I) + (IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFD_I+1)<<8);
    51                 rQ = IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFD_Q) + (IIC_EEPROM_ReadByte(iic_ba, RC_EEPROM_TXDCO_ADDR_RFD_Q+1)<<8);
    52        
    53                 ad_set_TxDCO(ad_ba, AD4_CS, AD_CHAN_I, rI);
    54                 ad_set_TxDCO(ad_ba, AD4_CS, AD_CHAN_Q, rQ);
    55         }
    56        
    57         return 0;
    58 }}}
     19User designs should read Tx DCO calibration values from the EEPROM and update the AD9963 auxiliary DACs on every boot. The [wiki:/cores/radio_controller radio_controller] driver provides the function radioController_apply_TxDCO_calibration() implementing this process.
    5920
    6021
    6122=== Updating Tx DCO Calibration ===
    62 You may wish to occasionally re-run the Tx DCO calibration process to account for drift in component values with age. We provide a pre-built FPGA design which implements the Tx DCO calibration process. To use the design:
     23You may wish to occasionally re-run the Tx DCO calibration process to account for drift in component values with temperature and age. We provide a pre-built FPGA design which implements the Tx DCO calibration process. To use the design:
    6324
    6425 1. Terminate the RF interface to be calibrated into a 50 ohm load. The SMA terminators included with the WARP v3 kit are good for this. Alternately you can connect the RF interface to a spectrum analyzer to observe the Tx DCO calibration results.
    … …  
    6930 1. The calibration process is automatic and executes in <1 minute
    7031 1. When complete, the new calibration values will be recorded to the EEPROM
    71  1. The RF interface will now transmit a pure sinusoid at 8MHz above the center frequency of 2452MHz. You should observe a very low power tone at the center frequency, resulting from any residual Tx DCO. You can use the keyboard to further adjust the Tx DCO to check if the auto-calibration routine choose sub-optimal values. If you find values which show less energy at the center frequency, you can re-write the EEPROM by pressing {{{r}}}.
     32 1. The RF interface will now transmit a pure sinusoid at 2460MHz (8MHz baseband tone, center frequency of 2452MHz). You should observe a very low power tone at the center frequency, resulting from any residual Tx DCO. You can use the keyboard to further adjust the Tx DCO to check if the auto-calibration routine choose sub-optimal values. If you find values which show less energy at the center frequency, you can re-write the EEPROM by pressing {{{r}}}.
    7233
    7334Repeat this process for the other RF interface if desired. Always ensure the SMA connector of the active interface is terminated into 50 ohms before running the calibration routine.