Changes between Version 3 and Version 4 of WARPLab/HardwareConfiguration/WARPv3


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Timestamp:
Feb 11, 2015, 2:34:20 PM (9 years ago)
Author:
chunter
Comment:

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  • WARPLab/HardwareConfiguration/WARPv3

    v3 v4  
    3333
    3434  * The Trigger output and Trigger input pins above are used with the [wiki:WARPLab/Reference/TriggerManager Trigger Manager]
     35  * The  [wiki:HardwareUsersGuides/CM-PLL CM-PLL Clock Module] shares FPGA I/O between boards as well as a clock reference. This allows easy node synchronization with a single cable. In WARPLab 7.5, the 4 trigger outputs are duplicated and sent to both the CM-PLL board as well as the debug header. The 4 trigger inputs are digitally ORed from pins connecting both the CM-PLL board as well as the debug header.
    3536
    3637
     
    3940''Updated for WARPLab 7.5'''
    4041
    41 The WARPLab reference design does not require any external clock connections. By default the reference design will use the oscillators on the WARP v3 board for all system and RF clocking.
     42The WARPLab reference design does not require any external clock connections. By default the reference design will use the oscillators on the WARP v3 board for all system and RF clocking. The reference design does support both sourcing and sinking external clocks for synchronization of multiple nodes. There are two hardware options for this synchronization: the [wiki:HardwareUsersGuides/CM-MMCX CM-MMCX Clock Module] and the [wiki:HardwareUsersGuides/CM-PLL CM-PLL Clock Module]
    4243
    43 The reference design does support both sourcing and sinking external clocks for synchronization of multiple nodes. The WARP v3 kit must be equipped with a [wiki:HardwareUsersGuides/CM-MMCX CM-MMCX Clock Module] to source/sink clocks. The role of each node is configured via the 2-position SIP switch on the CM-MMCX, according to the figure below.
     44'''[wiki:HardwareUsersGuides/CM-MMCX CM-MMCX Clock Module:]'''
     45
     46The CM-MMCX is capable of sourcing and/or sinking RF and sampling clocks. This clock module can be used in a daisy chain configuration, where a single primary node shares its internal clocks with a chain of secondary nodes that adopt and forward the clocks. The role of each node is configured via the 2-position SIP switch on the CM-MMCX, according to the figure below.
    4447
    4548  * Detailed information on the WARP v3 Clocking configuration can be found [wiki:HardwareUsersGuides/WARPv3/Clocking here].
    46   * To adjust the [wiki:HardwareUsersGuides/CM-MMCX CM-MMCX Clock Module] functionality, please use the following SIP switch settings:
     49  * To adjust the functionality, please use the following SIP switch settings:
    4750
    4851[[Image(MMCX_v1_labelled.png)]]
    4952
     53'''[wiki:HardwareUsersGuides/CM-PLL CM-PLL Clock Module:] '''
     54
     55The CM-MMCX is capable of sourcing and/or sinking a clock referenced used to discipline a PLL on each node. This clock module can be used in a daisy chain configuration, where a single primary node shares its clock reference with a chain of secondary nodes that adopt and forward the clock reference. The role of each node is configured via the 6-position SIP switch on the CM-PLL, according to the figure below.
     56
     57  * Detailed information on the WARP v3 Clocking configuration can be found [wiki:HardwareUsersGuides/WARPv3/Clocking here].
     58  * To adjust the functionality, please use the following SIP switch settings:
     59
     60[[Image(PLL_v1_labelled.png)]]
    5061
    5162=== Ethernet ===