Changes between Version 3 and Version 4 of WARPLab/HardwareConfiguration


Ignore:
Timestamp:
May 14, 2013, 1:54:24 PM (11 years ago)
Author:
welsh
Comment:

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  • WARPLab/HardwareConfiguration

    v3 v4  
    2828
    2929
    30 {{{
    31 # Debug Header defined in system.ucf
     30[[Image(Debug_Header_Diagram.png)]]
    3231
    33 NET "DEBUGHDR<0>"      LOC = "AG27"  | IOSTANDARD = "LVCMOS25";            #pin 0  - Capture tracking
    34 NET "DEBUGHDR<1>"      LOC = "AE26"  | IOSTANDARD = "LVCMOS25";            #pin 1  - Transmit tracking
     32|| [[Image(wiki:HardwareUsersGuides/WARPv3/files:important.png,nolink,valign=middle)]] || '''These pins are not 3.3v compatible! ''' You must use external level shifting to interface with non-2.5v signals. ||
    3533
    36 NET "debug_sw_gpio<0>" LOC = "AF26"  | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 2  - SW debug pin 0
    37 NET "debug_sw_gpio<1>" LOC = "AD25"  | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 3  - SW debug pin 1
    38 NET "debug_sw_gpio<2>" LOC = "V24"   | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 4  - SW debug pin 2
    39 NET "debug_sw_gpio<3>" LOC = "AA23"  | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 5  - SW debug pin 3
    40 NET "debug_sw_gpio<4>" LOC = "AH30"  | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 6  - SW debug pin 4
    41 NET "debug_sw_gpio<5>" LOC = "AK31"  | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 7  - SW debug pin 5
     34[[Image(Debug_Header_Connections.png)]]
    4235
    43 NET "trigger_out<0>"   LOC = "AG28"  | IOSTANDARD = "LVCMOS25";            #pin 8  - Trigger output D0
    44 NET "trigger_out<1>"   LOC = "AE27"  | IOSTANDARD = "LVCMOS25";            #pin 9  - Trigger output D1
    45 NET "trigger_out<2>"   LOC = "AF28"  | IOSTANDARD = "LVCMOS25";            #pin 10 - Trigger output D2
    46 NET "trigger_out<3>"   LOC = "AJ29"  | IOSTANDARD = "LVCMOS25";            #pin 11 - Trigger output D3
    47 
    48 NET "trigger_in<0>"    LOC = "AH29"  | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 12 - Trigger input D0
    49 NET "trigger_in<1>"    LOC = "AL30"  | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 13 - Trigger input D1
    50 NET "trigger_in<2>"    LOC = "AM31"  | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 14 - Trigger input D2
    51 NET "trigger_in<3>"    LOC = "AP32"  | IOSTANDARD = "LVCMOS25" | PULLDOWN; #pin 15 - Trigger input D3
    52 
    53 }}}
    54 
    55 {{{
    56 # Debug Header default connections in system.mhs
    57 
    58 # DEBUG
    59  PORT debughdr      = warplab_mimo_4x4_plbw_0_debug_capturing & warplab_mimo_4x4_plbw_0_debug_transmitting, DIR = O, VEC = [1:0]
    60  PORT debug_sw_gpio = debug_sw_gpio, DIR = IO, VEC = [5:0]
    61  PORT trigger_in    = trig_0_in  & trig_1_in  & trig_2_in  & trig_3_in,  DIR = I, VEC = [0:3]
    62  PORT trigger_out   = trig_2_out & trig_3_out & trig_4_out & trig_5_out, DIR = O, VEC = [0:3]
    63 
    64 }}}
     36'''NOTE:''' The Debug Header is defined in the system.ucf and the connections are defined in the system.mhs
    6537
    6638  * The Trigger output and Trigger input pins above are used with the [wiki:WARPLab/Reference/TriggerManager Trigger Manager]
     39
    6740
    6841=== Clock Configuration ===