wiki:WARPLab/HardwareConfiguration

Version 5 (modified by welsh, 11 years ago) (diff)

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Hardware Configuration

System Requirements

WARP v3

No image "WARP_v3_labelled.png" attached to WARPLab/HardwareConfiguration

Radio Interface

  • In the 2 RF Node configuration (ie only RF A and RF B are populated), you should only use the 2RF bitstream in the download.
  • In the 4 RF Node configuration (ie all RF interfaces are populated), you should only use the 4RF bitstream in the download.

Dip Switches

Debug Header

The debug header is configured by default to map to the following pins:

No image "Debug_Header_Diagram.png" attached to WARPLab/HardwareConfiguration

These pins are not 3.3v compatible! You must use external level shifting to interface with non-2.5v signals.

No image "Debug_Header_Connections.png" attached to WARPLab/HardwareConfiguration

NOTE: The Debug Header is defined in the system.ucf and the connections are defined in the system.mhs

  • The Trigger output and Trigger input pins above are used with the Trigger Manager

Clock Configuration

  • Detailed information on the WARP v3 Clocking configuration can be found here.
  • To adjust the MMCX Clock Module functionality, please use the following SIP switch settings:

No image "MMCX_v1_labelled.png" attached to WARPLab/HardwareConfiguration

Ethernet

  • By default, only Ethernet connection A (Eth A) is used.

WARP v2

No image "WARP_v2_labelled.png" attached to WARPLab/HardwareConfiguration

Radio Interface

  • In the 2 RF Node configuration (ie only RF A and RF B are populated), you should only use the 2RF bitstream in the download.
  • In the 4 RF Node configuration (ie all RF interfaces are populated), you should only use the 4RF bitstream in the download.

Debug Header

The debug header is configured by default to map to the following pins:

No image "Debug_Header_Diagram_BnW.png" attached to WARPLab/HardwareConfiguration

Clock Configuration

Ethernet

  • Only one Ethernet connection (Eth A) on the board