WARP Workshop at Indian Institute of Technology Madras in Chennai, India - December 1-2, 2007
The sixth WARP workshop was held at IIT Madras December 1-2, 2007. We had 33 attendees from academia and industry, all learning how to use WARP in their own research.
The materials from the workshop are all available below. The lab exercises require version 9.1 of the Xilinx tools (ISE, EDK and Sysgen).
Slides
- WARP Hardware & Design Flows by Charles Camp (3.0MB PDF)
- WARP PHY Design Flow by Sid Gupta (4.1MB PDF)
- WARP MAC Design Flow by Chris Hunter & Patrick Murphy (4.6MB PDF)
Lab Exercises
- Lab 1: Introduction to WARP Design Flows (0.1MB PDF) Adder Model Adder Pcore
- Lab 2: Building a Simple Transmitter (0.1MB PDF) Lab 2 Files (13.2MB ZIP)
- Lab 3: Introduction to WARPLab (0.1MB PDF) WARPLab source files
- Lab 4: Building a Simple "MAC" (0.1MB PDF) Lab 4 files
- Lab 5: Building a Unidirectional MAC (1.4MB PDF) Lab 5 files
- Lab 6: Building a Channel-Hopping MAC (1.3MB PDF) Lab 6 files
Other Useful Resources
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Last modified on Dec 15, 2008, 1:40:20 PM