1 | /* Copyright (c) 2006 Rice University */ |
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2 | /* All Rights Reserved */ |
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3 | /* This code is covered by the Rice-WARP license */ |
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4 | /* See http://warp.rice.edu/license/ for details */ |
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5 | |
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6 | |
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7 | ////////////////////////////////////////////////////////////////////////////// |
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8 | // Filename: C:\EDK_User_Repository\WARP\drivers\EEPROM_v1_00_a\src\EEPROM_l.c |
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9 | // Version: 1.00.a |
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10 | // Description: EEPROM Driver Source File |
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11 | // Date: July 28, 2006 |
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12 | ////////////////////////////////////////////////////////////////////////////// |
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13 | |
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14 | |
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15 | /***************************** Include Files *******************************/ |
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16 | |
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17 | #include "EEPROM_l.h" |
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18 | #include "xparameters.h" |
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19 | #include <stdlib.h> |
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20 | |
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21 | /****************************WARP LIBRARIES**************************/ |
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22 | |
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23 | // Initialize the EEPROM master for communication. Required before any communication |
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24 | // can be made on the 1wire bus. Performs a master reset, and must be done before any |
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25 | // communication can happen on the 1-wire bus. |
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26 | // Assumes a EEPROM_select call has already been made. Defaults to the FPGA board. |
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27 | // Sets the clock divisor based on the host bus speed (usually 40 or 80MHz) |
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28 | // baseaddr is the base address of the EEPROM device. |
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29 | // CLK_DIV_RATIO defined in EEPROM_l.h determines which clock division should be made |
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30 | |
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31 | char WarpEEPROM_Initialize(unsigned int* baseaddr) |
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32 | { |
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33 | //Xuint8 CMD_REG; |
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34 | Xuint8 CMD_REG, EEPROM_select; |
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35 | |
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36 | // Save current EEPROM selected. |
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37 | EEPROM_select = (EEPROM_mReadReg((volatile)baseaddr, 0x0) & 0x70); |
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38 | |
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39 | // For selecting the appropriate EEPROM |
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40 | CMD_REG = EEPROM_mReadReg((volatile)baseaddr, 0x0); |
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41 | EEPROM_mWriteReg((volatile)baseaddr, 0x0, (CMD_REG & 0x8F) + EEPROM_select); |
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42 | |
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43 | switch(CLK_DIV_RATIO) |
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44 | { |
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45 | case(1) : |
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46 | { |
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47 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x8); // Set divisor ratio |
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48 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x88); // Enable clock |
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49 | break; |
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50 | } |
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51 | case(2) : |
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52 | { |
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53 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x2); // Set divisor ratio |
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54 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x82); // Enable clock |
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55 | break; |
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56 | } |
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57 | case(3) : |
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58 | { |
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59 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x5); // Set divisor ratio |
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60 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x85); // Enable clock |
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61 | break; |
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62 | } |
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63 | case(4) : |
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64 | { |
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65 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x3); // Set divisor ratio |
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66 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x83); // Enable clock |
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67 | break; |
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68 | } |
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69 | case(5) : |
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70 | { |
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71 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0xC); // Set divisor ratio |
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72 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x8C); // Enable clock |
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73 | break; |
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74 | } |
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75 | case(6) : |
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76 | { |
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77 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x6); // Set divisor ratio |
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78 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x86); // Enable clock |
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79 | break; |
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80 | } |
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81 | case(7) : |
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82 | { |
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83 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x9); // Set divisor ratio |
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84 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x89); // Enable clock |
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85 | break; |
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86 | } |
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87 | case(8) : |
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88 | { |
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89 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x7); // Set divisor ratio |
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90 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x87); // Enable clock |
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91 | break; |
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92 | } |
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93 | case(9) : |
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94 | { |
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95 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x10); // Set divisor ratio |
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96 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x90); // Enable clock |
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97 | break; |
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98 | } |
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99 | case(10) : |
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100 | { |
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101 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0xA); // Set divisor ratio |
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102 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x8A); // Enable clock |
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103 | break; |
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104 | } |
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105 | case(11) : |
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106 | { |
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107 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0xD); // Set divisor ratio |
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108 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x8D); // Enable clock |
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109 | break; |
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110 | } |
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111 | case(12) : |
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112 | { |
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113 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0xB); // Set divisor ratio |
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114 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x8B); // Enable clock |
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115 | break; |
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116 | } |
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117 | case(13) : |
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118 | { |
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119 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x14); // Set divisor ratio |
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120 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x94); // Enable clock |
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121 | break; |
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122 | } |
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123 | case(14) : |
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124 | { |
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125 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0xE); // Set divisor ratio |
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126 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x8E); // Enable clock |
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127 | break; |
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128 | } |
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129 | case(15) : |
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130 | { |
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131 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x11); // Set divisor ratio |
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132 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x91); // Enable clock |
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133 | break; |
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134 | } |
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135 | case(16) : |
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136 | { |
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137 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0xF); // Set divisor ratio |
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138 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x8F); // Enable clock |
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139 | break; |
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140 | } |
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141 | case(17) : |
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142 | { |
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143 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x18); // Set divisor ratio |
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144 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x98); // Enable clock |
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145 | break; |
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146 | } |
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147 | case(18) : |
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148 | { |
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149 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x12); // Set divisor ratio |
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150 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x92); // Enable clock |
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151 | break; |
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152 | } |
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153 | case(19) : |
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154 | { |
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155 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x15); // Set divisor ratio |
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156 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x95); // Enable clock |
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157 | break; |
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158 | } |
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159 | case(20) : |
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160 | { |
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161 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x13); // Set divisor ratio |
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162 | EEPROM_mWriteReg((volatile)baseaddr, CLKDIV_REG_OFFSET, 0x93); // Enable clock |
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163 | break; |
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164 | } |
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165 | default : |
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166 | { |
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167 | print("\r\nNo or invalid clock speed specified.\r\n"); |
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168 | } |
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169 | } |
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170 | |
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171 | // Detect EEPROM on 1-wire bus and ready for a command |
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172 | Xuint8 check; |
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173 | |
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174 | check = WarpEEPROM_Detect(baseaddr); // Detect device on 1-wire line |
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175 | |
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176 | if(check == NO_DEVICE) // Quit w/ message if no device found |
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177 | { |
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178 | print("\r\nNo device found on the line.\r\n"); |
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179 | return NO_DEVICE; |
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180 | } |
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181 | |
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182 | return SUCCESS; |
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183 | } |
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184 | |
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185 | // Send a Reset out on the 1-wire device and wait for a presence detect. |
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186 | // Assumes previous initialization |
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187 | // baseaddr is the base address of the EEPROM device |
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188 | // Returns SUCCESS if device found |
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189 | // Else returns FAILURE |
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190 | char WarpEEPROM_Detect(unsigned int* baseaddr) |
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191 | { |
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192 | Xuint8 datareg; |
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193 | int checkCount = 0; |
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194 | |
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195 | // Send reset pulse on 1-wire |
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196 | datareg = EEPROM_mReadReg((volatile)baseaddr, COMMAND_REG_OFFSET); |
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197 | EEPROM_mWriteReg((volatile)baseaddr, COMMAND_REG_OFFSET, (datareg & 0xFE)+ 0x01); |
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198 | |
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199 | // Wait for presence detect window |
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200 | while((EEPROM_mReadReg((volatile)baseaddr, INTERRUPT_REG_OFFSET) & 0x01) == 0) |
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201 | { |
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202 | //Give up after a while, so we don't get stuck here forever if the EEPROM is broken |
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203 | if(checkCount++ > 100000) |
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204 | break; |
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205 | } |
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206 | |
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207 | // If device a device was found on 1-Wire, return SUCCESS, else FAILURE |
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208 | if((EEPROM_mReadReg((volatile)baseaddr, INTERRUPT_REG_OFFSET) & 0x02) == 0) |
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209 | return SUCCESS; |
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210 | else |
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211 | return NO_DEVICE; |
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212 | } |
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213 | |
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214 | // Writes a byte to the transmit buffer |
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215 | // Waits until Tx buffer/shift registers are empty before writing. |
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216 | // Waits until Rx buffer is full to continue. This is indicative of |
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217 | // completion of the sending. |
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218 | // Assumes previous Initialization and Detect |
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219 | // baseaddr is the base address of the EEPROM device |
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220 | // data is the byte to be written |
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221 | void WarpEEPROM_WriteByte(unsigned int* baseaddr, char data) |
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222 | { |
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223 | // Wait until Tx buffer/shift register are empty |
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224 | while((EEPROM_mReadReg((volatile)baseaddr, INTERRUPT_REG_OFFSET) & 0x3C) != 0xC) |
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225 | { |
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226 | EEPROM_mReadReg((volatile)baseaddr, TXRXBUFFER_OFFSET); |
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227 | } |
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228 | |
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229 | // Write to the Tx buffer |
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230 | EEPROM_mWriteReg((volatile)baseaddr, TXRXBUFFER_OFFSET, data); |
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231 | |
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232 | // Wait until Rx buffer is full -- indicates all has sent |
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233 | while((EEPROM_mReadReg((volatile)baseaddr, INTERRUPT_REG_OFFSET) & 0x10) == 0) |
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234 | { |
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235 | } |
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236 | } |
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237 | |
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238 | // Reads a data byte from the EEPROM |
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239 | // Assumes the EEPROM is ready to trasmit based on other commands. |
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240 | // Also assumes no other information is needing to be read. |
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241 | // Returns a byte. Default value is FF. |
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242 | // baseaddr is the base address of the EEPROM device |
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243 | char WarpEEPROM_ReadByte(unsigned int* baseaddr) |
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244 | { |
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245 | Xuint8 data; |
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246 | // Wait until Rx buffer/shift registers are clear. |
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247 | while((EEPROM_mReadReg((volatile)baseaddr, INTERRUPT_REG_OFFSET) & 0x30) != 0) |
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248 | { |
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249 | EEPROM_mReadReg((volatile)baseaddr, TXRXBUFFER_OFFSET); |
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250 | } |
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251 | |
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252 | // Write to EEPROM to retrieve byte |
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253 | WarpEEPROM_WriteByte(baseaddr, 0xFF); |
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254 | |
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255 | // Wait until Rx buffer is full |
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256 | while((EEPROM_mReadReg((volatile)baseaddr, INTERRUPT_REG_OFFSET) & 0x10) == 0) |
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257 | { |
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258 | } |
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259 | |
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260 | // Read and return byte |
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261 | data = EEPROM_mReadReg((volatile)baseaddr, TXRXBUFFER_OFFSET); |
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262 | |
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263 | return data; |
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264 | } |
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265 | |
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266 | // Given a 64 bit ROM from an EEPROM, checks to see that the family code |
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267 | // and serial number flies with the CRC. |
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268 | // Returns SUCCESS if no error, otherwise FAILURE |
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269 | char WarpEEPROM_VerifyROM(unsigned char *Serial) |
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270 | { |
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271 | // Initialize registers |
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272 | Xboolean reg0 = 0, |
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273 | reg1 = 0, |
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274 | reg2 = 0, |
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275 | reg3 = 0, |
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276 | reg4 = 0, |
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277 | reg5 = 0, |
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278 | reg6 = 0, |
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279 | reg7 = 0, |
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280 | reg8 = 0, |
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281 | reg8old = 0; |
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282 | |
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283 | Xuint8 i,bitsel,j, nextbit; |
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284 | |
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285 | for(i=0; i<8 ; i++) |
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286 | { |
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287 | for(bitsel=0; bitsel<8 ; bitsel++) |
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288 | { |
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289 | // Mask and shift to choose next bit |
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290 | nextbit = (Xboolean)((Serial[i] & (1 << bitsel)) >> bitsel); |
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291 | |
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292 | // Shift Algorithm to check CRC |
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293 | // Polynomial = X^8 + X^5 + X^4 + 1 |
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294 | reg8old = reg8; |
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295 | reg8 = reg7; |
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296 | reg7 = reg6; |
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297 | reg6 = reg5 ^ (nextbit ^ reg8old); |
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298 | reg5 = reg4 ^ (nextbit ^ reg8old); |
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299 | reg4 = reg3; |
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300 | reg3 = reg2; |
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301 | reg2 = reg1; |
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302 | reg1 = reg8old ^ nextbit; |
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303 | } |
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304 | } |
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305 | |
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306 | // If all registers are = 0, then the information was received correctly. |
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307 | if((reg1==0)&&(reg2==0)&&(reg3==0)&&(reg4==0)&&(reg5==0)&&(reg6==0)&&(reg7==0)&&(reg8==0)) |
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308 | return SUCCESS; |
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309 | else |
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310 | return FAILURE; |
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311 | } |
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312 | |
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313 | // This function verifies that the 16bit-CRC produced by the EEPROM |
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314 | // jives with the information sent over the 1-wire bus during |
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315 | // Read/Write Scratchpad commands. |
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316 | // array is the 13-byte (11 + 2-byte CRC) or 14-byte (12 + 2-byte CRC) |
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317 | // array of information |
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318 | // The function expects that the last 2 bytes of the array will be the |
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319 | // complement of the CRC sent over the 1-wire bus (that is the actual CRC). |
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320 | // RNW: 0 - if checking a write command, 1 -- if checking a read command |
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321 | // Returns SUCCESS if no error, otherwise FAILURE |
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322 | char WarpEEPROM_VerifyScratchpad(unsigned char *array, unsigned char RNW) |
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323 | { |
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324 | // Initialize registers |
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325 | Xboolean reg1 = 0, |
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326 | reg2 = 0, |
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327 | reg3 = 0, |
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328 | reg4 = 0, |
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329 | reg5 = 0, |
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330 | reg6 = 0, |
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331 | reg7 = 0, |
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332 | reg8 = 0, |
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333 | reg9 = 0, |
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334 | reg10 = 0, |
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335 | reg11 = 0, |
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336 | reg12 = 0, |
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337 | reg13 = 0, |
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338 | reg14 = 0, |
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339 | reg15 = 0, |
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340 | reg16 = 0, |
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341 | reg16old = 0; |
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342 | |
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343 | Xuint8 i,bitsel,j, nextbit; |
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344 | |
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345 | |
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346 | for(i=0; i < (13 + RNW) ; i++) |
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347 | { |
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348 | for(bitsel=0; bitsel<8 ; bitsel++) |
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349 | { |
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350 | // Mask and shift to choose next bit |
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351 | nextbit = (Xboolean)((array[i] & (1 << bitsel)) >> bitsel); |
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352 | |
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353 | // Shift Algorithm to check CRC |
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354 | // Polynomial = X^16 + X^15 + X^2 + 1 |
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355 | reg16old = reg16; |
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356 | reg16 = reg15 ^ (nextbit ^ reg16old); |
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357 | reg15 = reg14; |
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358 | reg14 = reg13; |
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359 | reg13 = reg12; |
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360 | reg12 = reg11; |
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361 | reg11 = reg10; |
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362 | reg10 = reg9; |
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363 | reg9 = reg8; |
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364 | reg8 = reg7; |
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365 | reg7 = reg6; |
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366 | reg6 = reg5; |
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367 | reg5 = reg4; |
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368 | reg4 = reg3; |
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369 | reg3 = reg2 ^ (nextbit ^ reg16old); |
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370 | reg2 = reg1; |
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371 | reg1 = reg16old ^ nextbit; |
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372 | } |
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373 | } |
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374 | |
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375 | // If all registers are = 0, then the information was received correctly. |
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376 | if((reg1==0)&&(reg2==0)&&(reg3==0)&&(reg4==0)&&(reg5==0)&&(reg6==0)&&(reg7==0)&&(reg8==0)&&(reg9==0)&&(reg10==0)&&(reg11==0)&&(reg12==0)&&(reg13==0)&&(reg14==0)&&(reg15==0)&&(reg16==0)) |
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377 | return SUCCESS; |
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378 | else |
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379 | return FAILURE; |
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380 | } |
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381 | |
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382 | // Given an array of information and addressing information, this function writes |
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383 | // the given information to the memory of the EEPROM. |
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384 | // baseaddr is the base address of the EEPROM device |
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385 | // page must be 0-3, and refers to memory pages on the device |
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386 | // sector must be 0-3, and refers to the appropriate sector on the device |
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387 | // array must be an 8 byte array |
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388 | char WarpEEPROM_WriteScratch(unsigned int* baseaddr, char page, char sector, unsigned char *array) |
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389 | { |
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390 | |
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391 | // Check to see that user gave valid location |
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392 | |
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393 | if((page > 3))// || (page < 0)) |
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394 | { |
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395 | print("\r\nInvalid Page Number\r\n"); |
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396 | return; |
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397 | } |
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398 | else if((sector > 3))// || (sector < 0)) |
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399 | { |
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400 | print("\r\nInvalid Sector Number\r\n"); |
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401 | return FAILURE; |
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402 | } |
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403 | |
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404 | /////////////////////////////////////////////////////////////////////////////// |
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405 | // INITIALIZATION SEQUENCE |
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406 | Xuint8 check, mem_address; |
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407 | |
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408 | WarpEEPROM_Initialize(baseaddr); // Set Clock |
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409 | |
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410 | WarpEEPROM_WriteByte(baseaddr, 0xCC); // Bypass ROM access |
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411 | |
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412 | /////////////////////////////////////////////////////////////////////////////// |
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413 | // COPY ARRAY TO SCRATCHPAD |
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414 | // Produce Array for Verifying Scratchpad Write |
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415 | Xuint8 verify[13]; |
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416 | |
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417 | // Send Write Scratchpad command |
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418 | WarpEEPROM_WriteByte(baseaddr, 0x0F); |
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419 | verify[0] = 0x0F; |
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420 | |
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421 | |
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422 | // Set memory address TA1 based on page and sector. |
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423 | mem_address = ((page & 0x03) << 5) + ((sector & 0x03) << 3); |
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424 | WarpEEPROM_WriteByte(baseaddr,mem_address); |
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425 | verify[1] = mem_address; |
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426 | |
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427 | // Second byte is always zero |
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428 | WarpEEPROM_WriteByte(baseaddr,0x0); |
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429 | verify[2] = 0; |
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430 | |
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431 | |
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432 | // Send 8 data bytes of array to scratchpad |
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433 | Xuint8 i; |
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434 | for(i=0;i<8;i++) |
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435 | { |
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436 | WarpEEPROM_WriteByte(baseaddr,array[i]); |
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437 | verify[i + 3] = array[i]; |
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438 | } |
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439 | |
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440 | // Receive 2 bytes of inverted CRC-16 |
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441 | // Receive CRC 1st byte |
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442 | Xuint8 CRC_n; |
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443 | CRC_n = WarpEEPROM_ReadByte(baseaddr); |
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444 | verify[11] = ~CRC_n; |
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445 | |
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446 | // Receive CRC 2nd byte |
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447 | CRC_n = WarpEEPROM_ReadByte(baseaddr); |
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448 | verify[12] = ~CRC_n; |
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449 | |
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450 | check = WarpEEPROM_VerifyScratchpad(verify, 0); |
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451 | //xil_printf("\r\n\r\nWriteSuccess (0) : %x\r\n", check); |
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452 | if(check == 0) |
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453 | return SUCCESS; |
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454 | else |
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455 | return FAILURE; |
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456 | } |
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457 | |
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458 | // This will read the current value in the scratchpad. |
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459 | // Returns the two memory location bytes and the E/S byte necessary |
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460 | // to copy the scratchpad to memory. |
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461 | // baseaddr is the base address of the EEPROM device |
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462 | // auth_code is a 11-byte array where the 3-byte authcode followed by the 8-byte |
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463 | // scratchpad value sent from the EEPROM will be stored |
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464 | char WarpEEPROM_ReadScratch(unsigned int* baseaddr, unsigned char* auth_code) |
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465 | { |
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466 | /////////////////////////////////////////////////////////////////////////////// |
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467 | // INITIALIZATION SEQUENCE |
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468 | Xuint8 check, mem_address; |
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469 | |
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470 | WarpEEPROM_Initialize(baseaddr); // Set Clock |
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471 | |
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472 | WarpEEPROM_WriteByte(baseaddr, 0xCC); // Bypass ROM access |
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473 | |
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474 | /////////////////////////////////////////////////////////////////////////////// |
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475 | // READ SCRATCHPAD |
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476 | |
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477 | // Make array for checking CRC-16 value |
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478 | Xuint8 verify[14]; |
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479 | |
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480 | // Send Read Scratchpad Command |
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481 | WarpEEPROM_WriteByte(baseaddr, 0xAA); |
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482 | verify[0] = 0xAA; |
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483 | |
---|
484 | // Get data bytes from EEPROM |
---|
485 | Xuint8 i, data; |
---|
486 | for(i = 0; i < 11; i++) |
---|
487 | { |
---|
488 | data = WarpEEPROM_ReadByte(baseaddr); |
---|
489 | auth_code[i] = data; |
---|
490 | verify[i+1] = data; |
---|
491 | } |
---|
492 | |
---|
493 | // Receive 2 bytes of inverted CRC-16 |
---|
494 | // Receive CRC 1st byte |
---|
495 | Xuint8 CRC_n; |
---|
496 | CRC_n = WarpEEPROM_ReadByte(baseaddr); |
---|
497 | verify[12] = ~CRC_n; |
---|
498 | |
---|
499 | // Receive CRC 2nd byte |
---|
500 | CRC_n = WarpEEPROM_ReadByte(baseaddr); |
---|
501 | verify[13] = ~CRC_n; |
---|
502 | |
---|
503 | check = WarpEEPROM_VerifyScratchpad(verify, 1); |
---|
504 | //xil_printf("Read Success (0) : %x\r\n", check); |
---|
505 | if(check == 0) |
---|
506 | return SUCCESS; |
---|
507 | else |
---|
508 | return FAILURE; |
---|
509 | } |
---|
510 | |
---|
511 | // After the information in the scratchpad has been verified via CRC check, the |
---|
512 | // scratchpad read, and the authorization code returned, this command will copy |
---|
513 | // the scratchpad into the flash memory specified. |
---|
514 | // baseaddr is the base address of the EEPROM device |
---|
515 | // auth_code a 3 byte array containing the 2-byte memory location and |
---|
516 | // 1-byte E/S regsiter value returned during a ReadScratch command. |
---|
517 | // Returns SUCCESS if no error, otherwise FAILURE |
---|
518 | char WarpEEPROM_Scratch2Mem(unsigned int* baseaddr, unsigned char* auth_code) |
---|
519 | { |
---|
520 | /////////////////////////////////////////////////////////////////////////////// |
---|
521 | // INITIALIZATION SEQUENCE |
---|
522 | Xuint8 check; |
---|
523 | |
---|
524 | WarpEEPROM_Initialize(baseaddr); // Set Clock |
---|
525 | |
---|
526 | WarpEEPROM_WriteByte(baseaddr, 0xCC); // Bypass ROM access |
---|
527 | |
---|
528 | /////////////////////////////////////////////////////////////////////////////// |
---|
529 | // COPY SCRATCHPAD TO MEMORY |
---|
530 | |
---|
531 | // Give Copy Scratchpad Command |
---|
532 | WarpEEPROM_WriteByte(baseaddr, 0x55); |
---|
533 | |
---|
534 | // Write authorization bytes to EEPROM |
---|
535 | Xuint8 i; |
---|
536 | for(i = 0; i < 3; i++) |
---|
537 | { |
---|
538 | WarpEEPROM_WriteByte(baseaddr, auth_code[i]); |
---|
539 | } |
---|
540 | |
---|
541 | usleep(12500); // 12.5ms for data transfer |
---|
542 | |
---|
543 | check = WarpEEPROM_ReadByte(baseaddr); |
---|
544 | //xil_printf("AA for success : %x\r\n", check); |
---|
545 | |
---|
546 | if(check == 0xAA) |
---|
547 | return SUCCESS; |
---|
548 | else |
---|
549 | return FAILURE; |
---|
550 | } |
---|
551 | |
---|
552 | // This function reads from a specified memory location in the 1024-bit memory. |
---|
553 | // Returns an 8-byte sector of the EEPROM. |
---|
554 | // baseaddr is the base address of the EEPROM device |
---|
555 | // page must be 0-3, and refers to memory pages on the device |
---|
556 | // sector must be 0-3, and refers to the appropriate sector on the device |
---|
557 | // array must be an 8 byte array |
---|
558 | // Returns SUCCESS if no error, otherwise FAILURE |
---|
559 | char WarpEEPROM_ReadMem(unsigned int* baseaddr, char page, char sector, unsigned char *memory) |
---|
560 | { |
---|
561 | // Check to see that user gave valid location |
---|
562 | if((page > 3)) // || (page < 0)) |
---|
563 | { |
---|
564 | print("Invalid Page Number"); |
---|
565 | return FAILURE; |
---|
566 | } |
---|
567 | else if((sector > 3)) // || (sector < 0)) |
---|
568 | { |
---|
569 | print("Invalid Sector Number"); |
---|
570 | return FAILURE; |
---|
571 | } |
---|
572 | |
---|
573 | /////////////////////////////////////////////////////////////////////////////// |
---|
574 | // INITIALIZATION SEQUENCE |
---|
575 | Xuint8 check, mem_address; |
---|
576 | |
---|
577 | WarpEEPROM_Initialize(baseaddr); // Set Clock |
---|
578 | |
---|
579 | WarpEEPROM_WriteByte(baseaddr, 0xCC); // Bypass ROM access |
---|
580 | |
---|
581 | /////////////////////////////////////////////////////////////////////////////// |
---|
582 | // READ FROM MEMORY |
---|
583 | |
---|
584 | // Send Read Memory command |
---|
585 | WarpEEPROM_WriteByte(baseaddr, 0xF0); |
---|
586 | |
---|
587 | |
---|
588 | // Set memory address TA1 based on page and sector. |
---|
589 | mem_address = ((page & 0x03) << 5) + ((sector & 0x03) << 3); |
---|
590 | WarpEEPROM_WriteByte(baseaddr,mem_address); |
---|
591 | |
---|
592 | // Second byte is always zero |
---|
593 | WarpEEPROM_WriteByte(baseaddr,0x0); |
---|
594 | |
---|
595 | // Receive 8 data bytes from memory |
---|
596 | Xuint8 i; |
---|
597 | for(i=0;i<8;i++) |
---|
598 | { |
---|
599 | memory[i] = WarpEEPROM_ReadByte(baseaddr); |
---|
600 | } |
---|
601 | return SUCCESS; |
---|
602 | } |
---|
603 | |
---|
604 | // Writes a given 8-byte array to a designated location in memory. |
---|
605 | // Essentially a wrapper of the WriteScratch, ReadScratch and Scratch2Mem functions |
---|
606 | // baseaddr is the base address of the EEPROM device |
---|
607 | // page must be 0-3, and refers to memory pages on the device |
---|
608 | // sector must be 0-3, and refers to the appropriate sector on the device |
---|
609 | // array must be an 8 byte array |
---|
610 | char WarpEEPROM_WriteMem(unsigned int* baseaddr, char page, char sector, unsigned char *array) |
---|
611 | { |
---|
612 | Xuint8 array2[11], check; |
---|
613 | |
---|
614 | check = WarpEEPROM_WriteScratch(baseaddr, page, sector, array); |
---|
615 | if(check != 0) |
---|
616 | return FAILURE; |
---|
617 | check = WarpEEPROM_ReadScratch(baseaddr, array2); |
---|
618 | if(check != 0) |
---|
619 | return FAILURE; |
---|
620 | check = WarpEEPROM_Scratch2Mem(baseaddr, array2); |
---|
621 | if(check != 0) |
---|
622 | return FAILURE; |
---|
623 | |
---|
624 | return SUCCESS; |
---|
625 | } |
---|
626 | |
---|
627 | // Reads and outputs the values stored in the 5 protection bytes, the factory byte, and the |
---|
628 | // two user bytes. |
---|
629 | void WarpEEPROM_ReadControlBytes(unsigned int* baseaddr, char *control_regs) |
---|
630 | { |
---|
631 | /////////////////////////////////////////////////////////////////////////////// |
---|
632 | // INITIALIZATION SEQUENCE |
---|
633 | Xuint8 check, mem_address; |
---|
634 | |
---|
635 | WarpEEPROM_Initialize(baseaddr); // Set Clock |
---|
636 | |
---|
637 | WarpEEPROM_WriteByte(baseaddr, 0xCC); // Bypass ROM access |
---|
638 | |
---|
639 | /////////////////////////////////////////////////////////////////////////////// |
---|
640 | // READ FROM MEMORY |
---|
641 | |
---|
642 | // Send Read Memory command |
---|
643 | WarpEEPROM_WriteByte(baseaddr, 0xF0); |
---|
644 | |
---|
645 | // Set memory address TA1 based on page and sector. |
---|
646 | mem_address = 0x80; |
---|
647 | WarpEEPROM_WriteByte(baseaddr,mem_address); |
---|
648 | |
---|
649 | // Second byte is always zero |
---|
650 | WarpEEPROM_WriteByte(baseaddr,0x0); |
---|
651 | |
---|
652 | // Receive 8 data bytes from memory |
---|
653 | Xuint8 i; |
---|
654 | for(i=0;i<8;i++) |
---|
655 | { |
---|
656 | control_regs[i] = WarpEEPROM_ReadByte(baseaddr); |
---|
657 | } |
---|
658 | //xil_printf("\r\nProtection Control Byte Page 0: %x", control_regs[0]); |
---|
659 | //xil_printf("\r\nProtection Control Byte Page 1: %x", control_regs[1]); |
---|
660 | //xil_printf("\r\nProtection Control Byte Page 2: %x", control_regs[2]); |
---|
661 | //xil_printf("\r\nProtection Control Byte Page 3: %x", control_regs[3]); |
---|
662 | //xil_printf("\r\nCopy Protection Byte: %x", control_regs[4]); |
---|
663 | //xil_printf("\r\nFactory Byte: %x", control_regs[5]); |
---|
664 | //xil_printf("\r\nUser Byte: %x", control_regs[6]); |
---|
665 | //xil_printf("\r\nUser Byte: %x\r\n", control_regs[7]); |
---|
666 | |
---|
667 | } |
---|
668 | |
---|
669 | // Retrieves the type of board. Returns a char. |
---|
670 | // Return values: 0x01 -- FPGA Board |
---|
671 | // 0x02 -- Radio Board |
---|
672 | char WarpEEPROM_GetDeviceType(unsigned int* baseaddr) |
---|
673 | { |
---|
674 | Xuint8 memory[8]; |
---|
675 | WarpEEPROM_ReadMem(baseaddr, 0, 0, memory); |
---|
676 | return memory[0] & 0x1F; |
---|
677 | } |
---|
678 | |
---|
679 | // A utility function for taking ascii input and turning it into a hex number |
---|
680 | char WarpEEPROM_ascii2hex(unsigned char ascii) |
---|
681 | { |
---|
682 | if((ascii < 48) || ((ascii > 57) && (ascii < 65)) || ((ascii > 70) && (ascii < 97)) || (ascii > 102)) |
---|
683 | return 0x00; // return 0 if bad input. less harmful than other options |
---|
684 | else if(ascii <= 57) |
---|
685 | return (char)(ascii - 48); |
---|
686 | else if(ascii <= 70) |
---|
687 | return (char)(ascii - 55); |
---|
688 | else |
---|
689 | return (char)(ascii - 87); |
---|
690 | } |
---|
691 | |
---|
692 | // A utility function for taking two sequential keyboard inputs and |
---|
693 | // returning a single hex byte. Used for hex input from keyboard |
---|
694 | char WarpEEPROM_ascii2hexbyte(unsigned char MSB, unsigned char LSB) |
---|
695 | { |
---|
696 | Xuint8 MSBx,LSBx, byte; |
---|
697 | |
---|
698 | MSBx = WarpEEPROM_ascii2hex(MSB); |
---|
699 | LSBx = WarpEEPROM_ascii2hex(LSB); |
---|
700 | |
---|
701 | return (char)((MSBx << 4) + LSBx); |
---|
702 | } |
---|
703 | |
---|
704 | |
---|
705 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
706 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
707 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
708 | //*************************************************************************************************************// |
---|
709 | //*************************************************************************************************************// |
---|
710 | //*************************************************************************************************************// |
---|
711 | // THE FOLLOWING FUNCTION CAN BE USED TO WRITE TO THE WRITE PROTECTION BYTES AND THE TWO USER BYTES // |
---|
712 | // SOME WRITES CAN NEVER BE CHANGED. EVER. USE AT YOUR OWN RISK. // |
---|
713 | //*************************************************************************************************************// |
---|
714 | //*************************************************************************************************************// |
---|
715 | //*************************************************************************************************************// |
---|
716 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
717 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
718 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
719 | |
---|
720 | //*********************************************************************************************************** |
---|
721 | //*********************************************************************************************************** |
---|
722 | //**WARNING**: Writing to any of the protection bytes is **IRREVERSIBLE**! |
---|
723 | // Both the write protect and EPROM mode commands write protect the |
---|
724 | // register to which they are written. |
---|
725 | //*********************************************************************************************************** |
---|
726 | //*********************************************************************************************************** |
---|
727 | // |
---|
728 | // Writes to one of the five protection bytes (if not already copy protected) or |
---|
729 | // to one of the User Bytes (if not copy protected). |
---|
730 | // baseaddr is the base address of the EEPROM device |
---|
731 | // ByteSelect: |
---|
732 | // 0: Protection Control Byte Page 0 |
---|
733 | // 1: Protection Control Byte Page 1 |
---|
734 | // 2: Protection Control Byte Page 2 |
---|
735 | // 3: Protection Control Byte Page 3 |
---|
736 | // 4: Copy Protection Byte |
---|
737 | // 5: User Byte #1 |
---|
738 | // 6: User Byte #2 |
---|
739 | // |
---|
740 | |
---|
741 | char WarpEEPROM_ControlByteWrite(unsigned int* baseaddr, char ByteSelect, char value2store) |
---|
742 | { |
---|
743 | Xuint8 choice; |
---|
744 | if(ByteSelect < 5) |
---|
745 | { |
---|
746 | print("\r\nReturning\r\n"); |
---|
747 | return; // Remove in order to enable writing to control bytes. |
---|
748 | print("\r\nSETTING THE PROTECTION REGISTERS TO WRITE PROTECT OR EPROM MODE IS\r\n"); |
---|
749 | print("\r\n ***IRREVERSIBLE***\r\n"); |
---|
750 | print("\r\nDo you wish to continue? (y)\r\n"); |
---|
751 | choice = XUartLite_RecvByte(STDIN_BASEADDRESS); |
---|
752 | if(choice != 'y') |
---|
753 | return ABORT; |
---|
754 | |
---|
755 | print("\r\nPlease Verify the Control Byte you are Writing\r\n"); |
---|
756 | print(" 0: Protection Control Byte Page 0\r\n"); |
---|
757 | print(" 1: Protection Control Byte Page 1\r\n"); |
---|
758 | print(" 2: Protection Control Byte Page 2\r\n"); |
---|
759 | print(" 3: Protection Control Byte Page 3\r\n"); |
---|
760 | print(" 4: Copy Protection Byte\r\n"); |
---|
761 | print(" 5: User Byte #1\r\n"); |
---|
762 | print(" 6: User Byte #2\r\n"); |
---|
763 | choice = XUartLite_RecvByte(STDIN_BASEADDRESS); |
---|
764 | if((choice - 48) != ByteSelect) |
---|
765 | return ABORT; |
---|
766 | |
---|
767 | print("\r\nPlease Verify the value you are writing is %x. (k)\r\n", value2store); |
---|
768 | choice = XUartLite_RecvByte(STDIN_BASEADDRESS); |
---|
769 | if(choice != 'k') |
---|
770 | return ABORT; |
---|
771 | |
---|
772 | print("\r\nSETTING THE PROTECTION REGISTERS TO 'WRITE PROTECT' OR 'EPROM MODE' IS\r\n"); |
---|
773 | print("\r\n ***IRREVERSIBLE***\r\n"); |
---|
774 | print("\r\nDo you wish to continue? (y)\r\n"); |
---|
775 | choice = XUartLite_RecvByte(STDIN_BASEADDRESS); |
---|
776 | if(choice != 'y') |
---|
777 | return ABORT; |
---|
778 | } |
---|
779 | |
---|
780 | // Obtain Current Control Register Values |
---|
781 | Xuint8 control_regs[8], mem_address; |
---|
782 | WarpEEPROM_ReadControlBytes(baseaddr, control_regs); |
---|
783 | mem_address = 0x80; |
---|
784 | switch(ByteSelect) |
---|
785 | { |
---|
786 | case(0) : |
---|
787 | { |
---|
788 | control_regs[0] = value2store; break; |
---|
789 | } |
---|
790 | case(1) : |
---|
791 | { |
---|
792 | control_regs[1] = value2store; break; |
---|
793 | |
---|
794 | } |
---|
795 | case(2) : |
---|
796 | { |
---|
797 | control_regs[2] = value2store; break; |
---|
798 | |
---|
799 | } |
---|
800 | case(3) : |
---|
801 | { |
---|
802 | control_regs[3] = value2store; break; |
---|
803 | |
---|
804 | } |
---|
805 | case(4) : |
---|
806 | { |
---|
807 | control_regs[4] = value2store; break; |
---|
808 | |
---|
809 | } |
---|
810 | case(5) : |
---|
811 | { |
---|
812 | control_regs[6] = value2store; break; |
---|
813 | |
---|
814 | } |
---|
815 | case(6) : |
---|
816 | { |
---|
817 | control_regs[7] = value2store; break; |
---|
818 | |
---|
819 | } |
---|
820 | default : return; break; |
---|
821 | } |
---|
822 | |
---|
823 | //////////////////////////////////////////////////////////////////////////////////// |
---|
824 | // Write Scratchpad |
---|
825 | Xuint8 CRC_n, check, verify[14]; |
---|
826 | WarpEEPROM_Initialize(baseaddr); |
---|
827 | WarpEEPROM_WriteByte(baseaddr, 0xCC); |
---|
828 | |
---|
829 | WarpEEPROM_WriteByte(baseaddr, 0x0F); verify[0] = 0x0F; |
---|
830 | |
---|
831 | WarpEEPROM_WriteByte(baseaddr, mem_address); verify[1] = mem_address; |
---|
832 | WarpEEPROM_WriteByte(baseaddr, 0x0); verify[2] = 0x0; |
---|
833 | |
---|
834 | WarpEEPROM_WriteByte(baseaddr, control_regs[0]); verify[3] = control_regs[0]; |
---|
835 | WarpEEPROM_WriteByte(baseaddr, control_regs[1]); verify[4] = control_regs[1]; |
---|
836 | WarpEEPROM_WriteByte(baseaddr, control_regs[2]); verify[5] = control_regs[2]; |
---|
837 | WarpEEPROM_WriteByte(baseaddr, control_regs[3]); verify[6] = control_regs[3]; |
---|
838 | WarpEEPROM_WriteByte(baseaddr, control_regs[4]); verify[7] = control_regs[4]; |
---|
839 | WarpEEPROM_WriteByte(baseaddr, control_regs[5]); verify[8] = control_regs[5]; |
---|
840 | WarpEEPROM_WriteByte(baseaddr, control_regs[6]); verify[9] = control_regs[6]; |
---|
841 | WarpEEPROM_WriteByte(baseaddr, control_regs[7]); verify[10] = control_regs[7]; |
---|
842 | |
---|
843 | CRC_n = WarpEEPROM_ReadByte(baseaddr); |
---|
844 | verify[11] = ~CRC_n; |
---|
845 | CRC_n = WarpEEPROM_ReadByte(baseaddr); |
---|
846 | verify[12] = ~CRC_n; |
---|
847 | |
---|
848 | check = WarpEEPROM_VerifyScratchpad(verify, 0); |
---|
849 | if(check != 0) |
---|
850 | return FAILURE; |
---|
851 | |
---|
852 | //////////////////////////////////////////////////////////////////////////////////// |
---|
853 | // Read Scratchpad |
---|
854 | WarpEEPROM_Initialize(baseaddr); |
---|
855 | WarpEEPROM_WriteByte(baseaddr, 0xCC); |
---|
856 | |
---|
857 | WarpEEPROM_WriteByte(baseaddr, 0xAA); verify[0] = 0xAA; |
---|
858 | |
---|
859 | verify[1] = WarpEEPROM_ReadByte(baseaddr); |
---|
860 | verify[2] = WarpEEPROM_ReadByte(baseaddr); |
---|
861 | verify[3] = WarpEEPROM_ReadByte(baseaddr); |
---|
862 | |
---|
863 | verify[4] = WarpEEPROM_ReadByte(baseaddr); |
---|
864 | verify[5] = WarpEEPROM_ReadByte(baseaddr); |
---|
865 | verify[6] = WarpEEPROM_ReadByte(baseaddr); |
---|
866 | verify[7] = WarpEEPROM_ReadByte(baseaddr); |
---|
867 | verify[8] = WarpEEPROM_ReadByte(baseaddr); |
---|
868 | verify[9] = WarpEEPROM_ReadByte(baseaddr); |
---|
869 | verify[10] = WarpEEPROM_ReadByte(baseaddr); |
---|
870 | verify[11] = WarpEEPROM_ReadByte(baseaddr); |
---|
871 | |
---|
872 | CRC_n = WarpEEPROM_ReadByte(baseaddr); verify[12] = ~CRC_n; |
---|
873 | CRC_n = WarpEEPROM_ReadByte(baseaddr); verify[13] = ~CRC_n; |
---|
874 | |
---|
875 | check = WarpEEPROM_VerifyScratchpad(verify, 1); |
---|
876 | if(check != 0) |
---|
877 | return FAILURE; |
---|
878 | |
---|
879 | //////////////////////////////////////////////////////////////////////////////////// |
---|
880 | // Copy Scratchpad |
---|
881 | WarpEEPROM_Initialize(baseaddr); |
---|
882 | WarpEEPROM_WriteByte(baseaddr, 0xCC); |
---|
883 | |
---|
884 | WarpEEPROM_WriteByte(baseaddr, 0x55); |
---|
885 | WarpEEPROM_WriteByte(baseaddr, verify[1]); |
---|
886 | WarpEEPROM_WriteByte(baseaddr, verify[2]); |
---|
887 | WarpEEPROM_WriteByte(baseaddr, verify[3]); |
---|
888 | usleep(12500); |
---|
889 | |
---|
890 | check = WarpEEPROM_ReadByte(baseaddr); |
---|
891 | if(check == 0xAA) |
---|
892 | { |
---|
893 | return SUCCESS; |
---|
894 | } |
---|
895 | else |
---|
896 | return FAILURE; |
---|
897 | } |
---|
898 | |
---|
899 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
900 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
901 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
902 | //*************************************************************************************************************// |
---|
903 | //*************************************************************************************************************// |
---|
904 | //*************************************************************************************************************// |
---|
905 | // THE ABOVE FUNCTION CAN BE USED TO WRITE TO THE WRITE PROTECTION BYTES AND THE TWO USER BYTES // |
---|
906 | // SOME WRITES CAN NEVER BE CHANGED. EVER. USE AT YOUR OWN RISK. // |
---|
907 | //*************************************************************************************************************// |
---|
908 | //*************************************************************************************************************// |
---|
909 | //*************************************************************************************************************// |
---|
910 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
911 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|
912 | ///////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
---|