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ModelRegisters

Timestamp:: Dec 27, 2006, 3:21:05 PM (17 years ago)
Author:: murphpo
Comment:: --

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OFDM/MIMO/Docs/ModelRegisters

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+                      v15
   ''(Bit 8)''   Enables the internal packet detection block. This should only be used when debugging the PHY over a wire when the external packet detector is not being used.
 ==== EXT_PKTDET_EN ====
   ''(Bit 7)''   Enables external packet detection via the ''[wiki:OFDM/MIMO/Docs/ModelPorts rx_extpktdet]'' top-level port
+  ''(Bit 7)''   Enables external packet detection via the ''[wiki:OFDM/MIMO/Docs/ModelPorts#OFDMCore rx_extpktdet]'' top-level port
 ==== REQ_SHORT_CORR ====
   ''(Bit 6)''   Requires either internal or external packet detection in order to begin processing a packet. When disabled, the receiver will begin processing packets when trigged only by the long correlator.
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   ''(Bit 5)''   Requires two threshold crossings from the long correlator, spaced exactly 64 cycles apart. When enaled, this makes packet detection more robust at the cost of more false negative detections.
 ==== SISO_MODE ====
   ''(Bit 4)   Enables single-antenna (SISO)'' mode in the receiver. In this mode, only packets transmitted in SISO mode will be properly received.
+  ''(Bit 4)''   Enables single-antenna (SISO) mode in the receiver. In this mode, only packets transmitted in SISO mode will be properly received.
 ==== DYN_PKT_LENGTHS ====
   ''(Bit 2)''   Enables dynamic packet lengths. This should be 1 for normal operation. When disabled, the receiver assumes every packet is a fixed length. This is useful during PHY debugging and BER testing.
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 === Fields: ===
 ==== EN_BADPKT_INT ====
   ''(Bit 5)'' Enables the bad packet interrupt output. The interrupt is raised via the top-level output ''[wiki:OFDM/MIMO/Docs/ModelPorts rx_int_badpkt]''. Bad packets are defined as packets which fail the CRC checksum calculation.
+  ''(Bit 5)'' Enables the bad packet interrupt output. The interrupt is raised via the top-level output ''[wiki:OFDM/MIMO/Docs/ModelPorts#OFDMCore rx_int_badpkt]''. Bad packets are defined as packets which fail the CRC checksum calculation.
 ==== EN_GOODPKT_INT ====
   ''(Bit 4)'' Enables the good packet interrupt output. The interrupt is raised via the top-level output ''[wiki:OFDM/MIMO/Docs/ModelPorts rx_int_goodpkt]''. Good packets are defined as packets which pass the CRC checksum calculation.
+  ''(Bit 4)'' Enables the good packet interrupt output. The interrupt is raised via the top-level output ''[wiki:OFDM/MIMO/Docs/ModelPorts#OFDMCore rx_int_goodpkt]''. Good packets are defined as packets which pass the CRC checksum calculation.
 ==== RST_BADPKT_INT ====
   ''(Bit 1)'' Resets the bad packet interrupt. The application must assert & de-assert this bit after processing a bad packet.
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 === Fields: ===
 ==== NUM_BYTES ====
   ''(Bits 11:0 - UFix12_0)'' This integer is the number of payload bytes present in the packet being prepared for transmission. This value must be updated before the transmitter is started. The application must assure that this value agrees with [wiki:#NUM_PYLD_SYMS NUM_PYLD_SYMS] and the selected modulation scheme.
+  ''(Bits 11:0 - UFix12_0)'' This integer is the number of payload bytes present in the packet being prepared for transmission. This value must be updated before the transmitter is started. The application must assure that this value agrees with [wiki:OFDM/MIMO/Docs/ModelRegisters#NUM_PYLD_SYMS NUM_PYLD_SYMS] and the selected modulation scheme.
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 === Fields: ===
 ==== PILOT1_INDEX_1 ====
   ''(Bits 5:0 - UFix6_0)'' Subcarrier index for first copy of pilot tone 1. This index should be symmetric about DC with [wiki:#PILOT1_INDEX_2 PILOT1_INDEX_2] below.
+  ''(Bits 5:0 - UFix6_0)'' Subcarrier index for first copy of pilot tone 1. This index should be symmetric about DC with [wiki:OFDM/MIMO/Docs/ModelRegisters#PILOT1_INDEX_2 PILOT1_INDEX_2] below.
 ==== PILOT1_INDEX_2 ====
   ''(Bits 21:16 - UFix6_0)''  Subcarrier index for second copy of pilot tone 1. This index should be symmetric about DC with [wiki:#PILOT1_INDEX_1 PILOT1_INDEX_1] above.
+  ''(Bits 21:16 - UFix6_0)''  Subcarrier index for second copy of pilot tone 1. This index should be symmetric about DC with [wiki:OFDM/MIMO/Docs/ModelRegisters#PILOT1_INDEX_1 PILOT1_INDEX_1] above.
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 === Fields: ===
 ==== PILOT2_INDEX_1 ====
   ''(Bits 5:0 - UFix6_0)'' Subcarrier index for first copy of pilot tone 2. This index should be symmetric about DC with [wiki:#PILOT2_INDEX_2 PILOT2_INDEX_2] below.
+  ''(Bits 5:0 - UFix6_0)'' Subcarrier index for first copy of pilot tone 2. This index should be symmetric about DC with [wiki:OFDM/MIMO/Docs/ModelRegisters#PILOT2_INDEX_2 PILOT2_INDEX_2] below.
 ==== PILOT2_INDEX_2 ====
   ''(Bits 21:16 - UFix6_0)''  Subcarrier index for second copy of pilot tone 2. This index should be symmetric about DC with [wiki:#PILOT2_INDEX_1 PILOT2_INDEX_1] above.
+  ''(Bits 21:16 - UFix6_0)''  Subcarrier index for second copy of pilot tone 2. This index should be symmetric about DC with [wiki:OFDM/MIMO/Docs/ModelRegisters#PILOT2_INDEX_1 PILOT2_INDEX_1] above.
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   ''(Bits 1:0 - UFix1_0)'' Enables SISO mode in the transmitter. This option can be enabled per packet and will only function correctly when used with a receiver in SISO mode.
 ==== RANDOM_PYLD ====
   ''(Bits 2:1 - UFix1_0)'' Enables random payload mode, which transmits random symbols in every subcarrier. The modulation scheme used is configured in the [wiki:#RAND_PLD_MOD_SEL RAND_PLD_MOD_SEL] field.
+  ''(Bits 2:1 - UFix1_0)'' Enables random payload mode, which transmits random symbols in every subcarrier. The modulation scheme used is configured in the [wiki:OFDM/MIMO/Docs/ModelRegisters#RAND_PLD_MOD_SEL RAND_PLD_MOD_SEL] field.
 ==== DISABLE_ANTB_PREAMBLE ====
   ''(Bits 3:2 - UFix1_0)'' When asserted, disables the transmission of a preamble from antenna B.
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 === Fields: ===
 ==== BER_TOTALBITS ====
   ''(Bits 31:0 - UFix32_0)'' Total number of bits received. Divide [wiki:#BER_ERRORS BER_ERRORS] by this field to calculate the bit error rate.
+  ''(Bits 31:0 - UFix32_0)'' Total number of bits received. Divide [wiki:OFDM/MIMO/Docs/ModelRegisters#BER_ERRORS BER_ERRORS] by this field to calculate the bit error rate.
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 === Fields: ===
 ==== RX_GOODPKT ====
   ''(Bits 1:0 - UFix1_0)'' Active high when a good packet is received. This field will only go high when [wiki:#EN_GOODPKT_INT EN_GOODPKT_INT] is enabled and must be cleared by asserting [wiki:#RST_GOODPKT_INT RST_GOODPKT_INT].
+  ''(Bits 1:0 - UFix1_0)'' Active high when a good packet is received. This field will only go high when [wiki:OFDM/MIMO/Docs/ModelRegisters#EN_GOODPKT_INT EN_GOODPKT_INT] is enabled and must be cleared by asserting [wiki:OFDM/MIMO/Docs/ModelRegisters#RST_GOODPKT_INT RST_GOODPKT_INT].
 ==== RX_BADPKT ====
   ''(Bits 2:1 - UFix1_0)'' Active high when a bad packet is received. This field will only go high when [wiki:#EN_BADPKT_INT EN_BADPKT_INT] is enabled and must be cleared by asserting [wiki:#RST_BADPKT_INT RST_BADPKT_INT].
+  ''(Bits 2:1 - UFix1_0)'' Active high when a bad packet is received. This field will only go high when [wiki:OFDM/MIMO/Docs/ModelRegisters#EN_BADPKT_INT EN_BADPKT_INT] is enabled and must be cleared by asserting [wiki:OFDM/MIMO/Docs/ModelRegisters#RST_BADPKT_INT RST_BADPKT_INT].
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