Simulating the Design

Now that the design is complete it needs to be simulated. As System Generator is an add-on to Simulink the same simulation environment can be used.

Start off by changing the initial value of the phaseInc register to 2^20.

Change the simlation time to 2^12. This will ensure that we will step through the entire sine and cosine ROM one step at a time. Press the play button to begin the simulation.

Open the scope once completed and hit the autoscale (binoculars) button. This scales the output data to fit the screen extents.

Smooth sinusoids that cover -0.5 to 0.5 and take 2^12 samples should be visible on the screen. At this point the design has been validated. However, as a good rule of thumb, it is better to simulate larger designs in shorter steps and intermediate points rather than trying to debug the entire model together.

The final step is to create the HDL corresponding to this model.