wiki:HardwareUsersGuides/FPGABoard_v2.2/UserIO/warp_v4_userio

Version 4 (modified by sgupta, 15 years ago) (diff)

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Custom User I/O Control Core

A custom core for user I/O control is available in the repository and during the base system builder process. The core allows the user to control the LEDs, read the push buttons and DIP switches and output patterns to the 7-segment displays. The core also implements the mapping of 4-bit hexadecimal characters to 7-bit patterns used to drive the 7-segment displays. This mapping is enabled per display at runtime by user designs.

Register Bank

The core has 5 registers that enable the I/O functionality. Register 0 and 1 are the output and input registers for the dedicated I/O, namely the LEDs, the push buttons and the DIP switch.

Functions

As we know, there are four peripherals controlled by the UserIO controller.

Dedicated LEDs:

The following function call directly writes to the LED outputs. The value should be 8-bits wide and the baseaddress is the base address of the UserIO core. The least significant bit corresponds to LED0.

WarpV4_UserIO_Leds(baseaddress, value)

WarpV4_UserIO_PushB(baseaddress)

WarpV4_UserIO_DipSw(baseaddress) }}}