wiki:802.11/Usage/SDK

Version 3 (modified by murphpo, 7 years ago) (diff)

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Using the 802.11 Reference Design: SDK

The first step in modifying the 802.11 Reference Design software is creating a workspace in the Xilinx SDK and importing the reference software projects. The steps below describe how to create an SDK workspace containing the full software design.

Creating the SDK Workspace

  1. Ensure your Xilinx tools match the version used to create the reference design (see the download? page for the current versions)
  2. Ensure your local copy of the WARP edk_user_repository is up to date and in the repository search path of XPS (see edk_user_repository for details)
  3. Download the 802.11 Reference Design archive and expand the inner .zip archive in <ref_design_archive>/EDK_Projects/w3_802.11_EDK_vXXX.zip.
    • Be sure the expanded EDK project path has no spaces; C:/work/w3_802.11_EDK/ works, C:/Documents and Settings/user/w3_802.11_EDK/ does not
    • The text below assumes your expanded EDK project is in <xps_proj>/.
  4. Launch Xilinx SDK and select <xps_proj>/SDK_Workspace as the active workspace
  5. Select Xilinx Tools -> Repositories. In Local Repositories click New, then select <xps_proj>/ and click OK. Be sure to select the root of the XPS project (the folder containing system.mhs, not the SDK_Workspace folder.
  6. Import the SDK projects provided by the reference design
    1. Select File -> Import
    2. Expand General -> Existing Projects into Workspace, click Next
    3. Click Browse and navigate to <xps_proj>/SDK_Workspace
    4. 9 projects will be listed:
      wlan_bsp_cpu_high
      wlan_bsp_cpu_low
      wlan_mac_high_ap
      wlan_mac_high_ibss
      wlan_mac_high_sta
      wlan_mac_low_dcf
      wlan_mac_low_nomac
      wlan_mac_shared
      wlan_xps_XXX_hw_platform  <- the version number in this project name will change between releases
      
    5. Ensure all 9 projects are checked and click Finish
    6. In the SDK Project Explorer:
      1. Right click on the wlan_mac_high_ap project and select Change Referenced BSP. In the dialog box select wlan_bsp_cpu_high then click OK
      2. Right click on the wlan_mac_high_ibss project and select Change Referenced BSP. In the dialog box select wlan_bsp_cpu_high then click OK
      3. Right click on the wlan_mac_high_sta project and select Change Referenced BSP. In the dialog box select wlan_bsp_cpu_high then click OK
      4. Right click on the wlan_mac_low_dcf project and select Change Referenced BSP. In the dialog box select wlan_bsp_cpu_low then click OK
      5. Right click on the wlan_mac_low_nomac project and select Change Referenced BSP. In the dialog box select wlan_bsp_cpu_low then click OK
      6. Right click on the wlan_mac_high_ap project and select Clean Project
      7. Right click on the wlan_mac_high_ibss project and select Clean Project
      8. Right click on the wlan_mac_high_sta project and select Clean Project
      9. Right click on the wlan_mac_low_dcf project and select Clean Project
      10. Right click on the wlan_mac_low_nomac project and select Clean Project
  7. The 5 software applications (AP, STA, IBSS, DCF and NoMAC) should now build to completion. Click once on each project in the SDK Project Explorer tab and check the console for the message elfcheck passed

Once you've created the SDK workspace you can begin modifying the reference C code. By default the SDK will automatically compile a software project when any of its source files are modified and saved. Watch the SDK console tab for compiler warnings/errors.

Using the Modified Design

When the SDK has successfully compiled the software projects for CPU High and CPU Low, you can use the updated design in hardware.

The output of the XPS hardware implementation flow is a bitstream named system.bit. This bitstream contains the full hardware design. In this design the initial values of the memory blocks used for instruction/data are all zero.

The SDK's Program FPGA tool (under the Xilinx Tools menu) implements the process of updating the memory blocks in system.bit with the software binary (the .elf file) generated by the SDK compiler/linker. The output of this flow is a new bistream named download.bit, ready to download to the FPGA.

The Program FPGA tool requires selection of one software binary per processor in the design. You must select a valid .elf file per CPU. If you select the default bootloop, the corresponding processor will be configured with a "do nothing forever" application, leading to a boot failure of the 802.11 design.

The image below shows the .elf selections to use the IBSS application in CPU High and DCF MAC in CPU Low:

After selecting valid .elf files click Program. This will generate the file download.bit in <SDK_Workspace>/Mango_802.11_RefDes_vXXX_hw_platform/. If you have a JTAG cable attached to your PC the tool will also attempt configuring your FPGA with the updated design. If no JTAG cable or FPGA is found, the tool will report "Program FPGA Failed". The download.bit file is still updated in this case.

If you want to generate a .bin file for use on SD cards, find the updated download.bit file as described above and follow the usual SD card config flow.