CM-MMCX User Guide: Clock Module I/O

The CM-MMCX clock module connects to the clock module header on a WARP v3 board. The clock module interface provides connections for power, ground, clock I/O and FPGA I/O.

The CM-MMCX module connections two FPGA I/O to a SIP switch (see the configuration page for details). The remaining FPGA I/O are unconnected on the CM-MMCX board.

The CM-MMCX module does not connect to the clock module header power pins.

Last modified 11 years ago Last modified on Jan 16, 2013, 4:14:17 AM